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Cool Image, Funny Joke & Live Chat
Max Maxfield  
6/17/2013   1 comment
Here's an image of the week and a joke of the week. Also, this week's live online chat takes place Thursday, June 20, at 1:00 p.m. ET (10:00 a.m. PT).
Discovering FPGAs: Implementing SPI & I2C Interfaces, Part 9
Duane Benson  
6/17/2013   2 comments
Duane is now poised to use his I2C interface to send commands to the driver boards controlling his robot avatar's motors.
Introducing CERN's Open Hardware Repository
Javier D. Garcia-Lasheras  
6/17/2013   15 comments
The Open Hardware Repository (OHR) has proven the feasibility of its open-but-commercial vision. More than 100 projects are hosted by the OHR, which is promoted by eleven research institutes and sixteen commercial companies.
Ask Max: How Do Mirrors Work?
Max Maxfield  
6/15/2013   17 comments
If you ask most people if they can explain how mirrors work, their knee-jerk reaction will be, "Yes, of course!" After reading this blog they may change their minds...
A Chess-Playing FPGA: Generate, Propagate & Attack!
Warren Miller  
6/14/2013   3 comments
In this blog we consider the attack logic for a single square; this can then be replicated to create the entire 64-square chess board.
Adam Powers Up His Zynq ZedBoard, Part 8
Adam Taylor  
6/14/2013   26 comments
In which we discover how to create a custom peripheral in the Zynq's programmable fabric in such a way that it can be controlled by the Zynq's processing system.
Ask Max: High-Speed Serial Interconnect
Max Maxfield  
6/13/2013   9 comments
One alternative to parallel interconnect in the form of busses is to use a serial interconnect setup. This typically involves a special transceiver block inside the device.
Hamster's I3C2 Programmable I2C Controller, Part 2
Mike Field  
6/13/2013   2 comments
Following a few modifications, the I3C2 controller can be used to communicate with a nine-axis sensor board.
Readable Mode/State: Coding for High-Noise Environments
William Murray  
6/12/2013   23 comments
Standards such as DO-254 advise to use counters rather than state machines, but coding with counters can get a tad unreadable. The alternative is to create a robust state machine.
Crusty Bits: Soggy News From Crusty Mansions
Michael Mannering  
6/12/2013   39 comments
Can I use sound signatures or non-invasive ultrasonic techniques coupled with FPGA-based digital signal processing to detect water failures in domestic plumbing pipes?
Implementing a PWM on the Opal Kelly Board
Tom Burke  
6/11/2013   20 comments
Pulse-width modulation (PWM) is used for all sorts of things, including servo motor control, DC motor control, AC induction motor control, and the voltage output control on switching voltage regulators.
Don't Miss This Week's Live Chat
Max Maxfield  
6/10/2013   12 comments
This week's live online chat takes place on Thursday, June 13, at 1:00 p.m. ET (10:00 a.m. PT).
Help Support the Planetary Resources ARKYD Project
Adam Skriver  
6/10/2013   35 comments
All Programmable Planet blogger Adam Skriver has been asked to be a vanguard for the Planetary Resources ARKYD Project.
Discovering FPGAs: Implementing SPI & I2C Interfaces, Part 8
Duane Benson  
6/10/2013   8 comments
There are a number of methods Duane could use to send data to his I2C module, but he decided on a "homegrown" FIFO buffer.
Ask Max: Why Are Things the Same Color?
Max Maxfield  
6/8/2013   31 comments
Our brains maintain a 3D color-map, in which every color is weighted in relation to every other color.
Implementing SerDes for FPGAs: More Challenges, Part 2
Warren Miller  
6/7/2013   3 comments
Now we are ready to consider the equalization, adaptation, and 2D eye scan blocks used in the receiver portion of a high-end FPGA transceiver.
FPGA Families Are Like Different Art Media
William Murray  
6/7/2013   8 comments
A true FPGA master can study a design problem and target application and then pick the best part and techniques for the situation.
Don't Quote Me!
Max Maxfield  
6/6/2013   27 comments
Do you add quotable quotes at the end of your emails? If so, please share them with the rest of us.
Constrained Random Is Like Pushing on String!
Brian Bailey  
6/5/2013   70 comments
I understand that there are not many viable alternatives to constrained random test pattern generation, so the industry is forced to use this, but to me it is highly flawed.
Using Verilog to Interface to a GUI
Tom Burke  
6/4/2013   6 comments
In this column, Tom revisits his original schematic projects and recreates them in pure Verilog code, thereby proving that sometimes old dawgs can be taught new tricks.
Don't Miss This Week's Live Chat!
Max Maxfield  
6/4/2013   8 comments
This week's live online chat takes place on Thursday, June 6, at 1:00 p.m. ET.
SHP & FPGA Timing Estimation With RTL: Gaussian Style
Tobias Strauch  
6/4/2013   13 comments
What does the German mathematician and physical scientist Johann Carl Friedrich Gauss from the mid-1800s have to do with timing estimation on a Virtex 5 FPGA in 2013?
FPGA-Based Displays Using More Than 3 Primary Colors
Max Maxfield  
6/3/2013   17 comments
Traditional televisions and computer displays use three primary colors, but alternatives using four or six primaries are already available or under evaluation.
Discovering FPGAs: Implementing SPI & I2C Interfaces, Part 7
Duane Benson  
6/3/2013   8 comments
Hurray! Break out the party hats and chocolate cigars -- Duane's I2C finite state machine (FSM) controller is finally working... well, sort-of.
Synchronous Serial Data & Elastic Buffers
William Murray  
5/31/2013   8 comments
If you are creating your own high-speed serial link, you have to deal with "drift" and "wander" due to things like clock jitter. One solution is to use an "elastic buffer."
Hamster's I3C2 Programmable I2C Controller, Part 1
Mike Field  
5/31/2013   44 comments
After the first couple of times, designing a state machine to "talk I2C" becomes more of a chore than a learning experience. Thus, the idea for my I3C2 intelligent I2C controller was born.
A Chess-Playing FPGA: The First Testbench!
Warren Miller  
5/30/2013   14 comments
Is the low-level module testbench described here sufficient, or is there a better approach? Should a self-test testbench be used? How important are concepts like portability, ease of understanding, and ability to make modifications?
Build Your Own FFT Platform Using an FPRF Chip
Paul Dillien  
5/30/2013   7 comments
Paul Dillien considers how one can construct a fast Fourier transform platform using a field-programmable radio frequency chip for signal analysis.
The FPGA Expert: GPS-Driven, FPGA-Decoded Nixie Tube Speedometer, Part 1
Luke Miller  
5/29/2013   12 comments
When I purchased a 1953 International Pickup Truck, I looked for a reason to make it digital, but 7-segment LED displays were not the answer -- instead, Nixie tubes are vintage-looking and bring a warm fuzzy feeling to the party.
Waxing Philosophical on My Birthday
Max Maxfield  
5/29/2013   42 comments
I remember when I was a kid in England and old people looked old. I mean, they looked really, really old.
Investigating Instantiation
Tom Burke  
5/28/2013   13 comments
In which Tom experiments with different ways of instantiating modules and compares the various tradeoffs.
Don't Miss This Week's Live Chat!
Max Maxfield  
5/28/2013   16 comments
This week's live online chat takes place on Thursday, May 30, 2013, at 1:00 p.m. ET.
Discovering FPGAs: Robot + ZedBoard + Linux, Part 2
Duane Benson  
5/27/2013   7 comments
Duane Benson has decided the FPGA fabric in the Zynq All Programmable SoC will handle the short-term obstacle avoidance navigation in real-time. The Linux OS will handle longer-scope activities like point-to-point navigation.
What Does an AND Gate Taste Like?
Max Maxfield  
5/27/2013   49 comments
I know someone who perceives different colors when looking at black-and-white gate-level schematic diagrams. Now I'm looking for someone who perceives logic gates as having "taste."
Ask Max: Primary Colors, Part 2
Max Maxfield  
5/24/2013   24 comments
We consider complementary versus analogous colors and the meaning of terms like shade, tint, and hue. We also introduce the concept of psychological primary colors.
The Microprocessor (R)evolution
Sven Andersson  
5/24/2013   21 comments
This "retrospective" blog describes how I became involved in testing microprocessors in 1976, and how microprocessors have influenced my professional work for many years...
Ask Max: Primary Colors, Part 1
Max Maxfield  
5/23/2013   23 comments
The appellation "primary colors" refers to a small collection of colors that can be combined to form a range of additional colors, but which "small collection of colors" should we use as our primaries?
FPGAs — What's Left to Integrate?
William Murray  
5/23/2013   21 comments
Today's FPGAs already integrate a substantial amount of "stuff" (MCU cores, programmable fabric, on-chip memory, etc.), so what's left to integrate and why is this being left for the future?
Are You Ready for Geek Pride Day (May 25)?
Max Maxfield  
5/22/2013   23 comments
To celebrate Geek Pride Day, Sylvie Barak has created a mega-cool infographic that depicts how geeks have been building the Internet since 1832.
Implementing SerDes for FPGAs: More Challenges
Warren Miller  
5/22/2013   3 comments
When traversing serial links with optics or backplanes, high-speed signals are degraded by impairments in the link, such as insertion loss, reflections, crosstalk, and optical dispersion.
Statistical Coverage for FPGA Verification
Brian Bailey  
5/22/2013   15 comments
Can statistical or heuristic verification really work for FPGA designs?
The Opal Kelly FrontPanel: Experimenting With 'okWireOR' Modules
Tom Burke  
5/21/2013   33 comments
One of the things I've been wondering is whether or not the "okWireOR" module is really just a giant OR, or if the order in which things are attached matters.
Field-Programmable Analog & GaAs – Oh My!
Max Maxfield  
5/21/2013   18 comments
I am shocked and horrified. It appears that those little scamps at Planet Analog are writing blogs pertaining to field-programmable issues.
Don't Miss This Week's Live Chat!
Max Maxfield  
5/20/2013   14 comments
This week's live online chat takes place on Thursday, May 23, 2013, at 1:00 p.m. ET.
Discovering FPGAs: Robot + ZedBoard + Linux
Duane Benson  
5/20/2013   8 comments
Duane has decided that the time is ripe to get his ZedBoard bolted onto his robot with a Linux distribution up and running. That was the ultimate plan anyway, so why wait?
A Word to the Wise
Max Maxfield  
5/17/2013   32 comments
Would you class these as adages, aphorisms, axioms, dictums, epigrams, maxims, precepts, saws, truisms, or... well, what?
Adam Powers Up His Zynq ZedBoard, Part 7
Adam Taylor  
5/17/2013   14 comments
Here we discover how to use the XADC (Xilinx Analog-to-Digital Convertor) in the Zynq All Programmable SoC to read the chip's internal temperature and voltage parameters and output them over an RS-232 link.
Extreme Thermal Cycling & Component Packaging
William Murray  
5/16/2013   10 comments
When extreme thermal cycling causes circuit boards and chip packages and the silicon die in the packages to expand and contract at different rates, problems may ensue.
Ask Max: Tri-State Fundamentals, Part 3
Max Maxfield  
5/16/2013   18 comments
In part 3 of this epic tale we consider how we might use tri-state buffers, leading up to the legendary bi-directional buffer.
Operational, Differential & Instrumentation Amplifiers, Part 2
Andrew Porter  
5/16/2013   13 comments
Digital engineers are often confused among operational amplifiers, differential amplifiers, and instrumentation amplifiers; this is exacerbated by the fact that their circuit symbols can be similar.
Page 1 / 2   >   >>




latest blogs
Here's an image of the week and a joke of the week. Also, this week's live online chat takes place Thursday, June 20, at 1:00 p.m. ET (10:00 a.m. PT).
Duane is now poised to use his I2C interface to send commands to the driver boards controlling his robot avatar's motors.
The Open Hardware Repository (OHR) has proven the feasibility of its open-but-commercial vision. More than 100 projects are hosted by the OHR, which is promoted by eleven research institutes and sixteen commercial companies.
If you ask most people if they can explain how mirrors work, their knee-jerk reaction will be, "Yes, of course!" After reading this blog they may change their minds...
In this blog we consider the attack logic for a single square; this can then be replicated to create the entire 64-square chess board.
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