A Word to the Wise
Max Maxfield 5/17/2013 9 comments
Would you class these as adages, aphorisms, axioms, dictums, epigrams, maxims, precepts, saws, truisms, or... well, what?
Adam Powers Up His Zynq ZedBoard, Part 7
Adam Taylor 5/17/2013 7 comments
Here we discover how to use the XADC (Xilinx Analog-to-Digital Convertor) in the Zynq All Programmable SoC to read the chip's internal temperature and voltage parameters and output them over an RS-232 link.
Measurement Error & Simulation Uncertainty
William Murray 5/9/2013 35 comments
In order to simulate a design we need models that represent the functionality and timing characteristics of our design elements, but the timing aspects of these models may be based on uncertain data.
PCBs Will Succumb to 3D ICs
Brian Bailey 5/8/2013 14 comments
I believe 3D ICs are basically the replacement for the PCB. In the near future, the PCB will become nothing other than a holder with the ability to add connectors and perhaps a few components that cannot be economically integrated within the chip package.
CPLDs: What Does the Future Hold?
Warren Miller 5/8/2013 7 comments
What might we see in new Ultra Low Density (ULD) CPLD families three-to-five years down the road? Are there new technologies or programmable structures that will find their way into ULD devices?
Ask Max: Tri-State Fundamentals
Max Maxfield 5/7/2013 7 comments
I believe that if you know how the hardware implementation actually works, then it greatly eases the task of understanding "life, the universe, and everything."
Basics of System Hyper Pipelining (SHP)
Tobias Strauch 5/2/2013 22 comments
The real benefits of the SHP approach are seen at the system level if one's system architecture involves multicores, which is why I call this technique "System Hyper Pipelining."
Where Do FPGAs Come From?
Brian Bailey 4/30/2013 59 comments
Is the recent news that Altera will be using the Intel 14nm node with TriGate technology for their future FPGAs significant, or is it just industry noise?
They Say...
Tom Burke 4/24/2013 51 comments
I am convinced that every country has its own governmental office buried deep down in some dark, dank basement -- on this office door is a single word: "They!"
Rolling the Kayak, MIG style
Mike Field 4/23/2013 10 comments
Over the past few days I have managed to create quite a few designs using the Xilinx Memory Interface Generator (MIG) and they all seem to work.
Where's Waldo (Max) at Design West?
Max Maxfield 4/22/2013 34 comments
I tell you – I don't know whether I'm coming or going at the moment – the Design West 2013 Conference and Exhibition is almost upon us -- and I for one will be a busy little bee.
|
|
 |
Would you class these as adages, aphorisms, axioms, dictums, epigrams, maxims, precepts, saws, truisms, or... well, what?
Here we discover how to use the XADC (Xilinx Analog-to-Digital Convertor) in the Zynq All Programmable SoC to read the chip's internal temperature and voltage parameters and output them over an RS-232 link.
When extreme thermal cycling causes circuit boards and chip packages and the silicon die in the packages to expand and contract at different rates, problems may ensue.
In part 3 of this epic tale we consider how we might use tri-state buffers, leading up to the legendary bi-directional buffer.
Digital engineers are often confused among operational amplifiers, differential amplifiers, and instrumentation amplifiers; this is exacerbated by the fact that their circuit symbols can be similar.
|
Tweet This
