Content posted in August 2012
Punched Cards With Round Holes
Max Maxfield 8/31/2012 14 comments
Although we all know that punched cards were used to store computer data in the not-so-distant past, there's always something new to learn...
Reliability of FPGA Designs
William Murray 8/30/2012 10 comments
When one creates a hardware design from scratch, as is essentially the case when using a programmable logic device/platform, hardware reliability becomes a critical issue.
VHDL Puzzle Contest
Max Maxfield 8/30/2012 15 comments
To celebrate the launch of his LogicStart MegaWing, the creator of the low-cost Papilio FPGA Development Platform is hosting a VHDL Puzzle Contest based on a conundrum posed by the author of a free VHDL book.
The Memory (R)evolution
Sven Andersson 8/28/2012 51 comments
ASIC and FPGA designer Sven Anderson continues his "Retrospective" series with reflections on the (r)evolution he's seen with regard to computer memories.
Ask Max: FPGAs & DSPs
Max Maxfield 8/23/2012 30 comments
The thing that often trips people up is that you don't actually need a digital signal processor to perform digital signal processing activities.
Heteromorphic Hobby Projects
Max Maxfield 8/17/2012 18 comments
Duane is working on his Robot Avatar project, and Ed is creating an electronic computer using only technology that was available in 1900 or earlier, but what about the other members of All Programmable Planet?
Ask Adam VHDL: Logic Values
Adam Taylor 8/16/2012 14 comments
A VHDL signal that uses the "std_logic_1164 package" can undertake one of nine different values. But why does a signal that spends the majority of its time as a 0 or 1 need seven other values to accurately represent its behavior?
1Gbit/s WiFi – White Space Communications via FPGA
William Murray 8/16/2012 9 comments
The ability of FPGAs to perform processing in parallel makes them particularly attractive for "white space" communications, because multiple channels can be dynamically loaded into the FPGA's logic based on current conditions.
Connecting Computation & Communication
Brian Bailey 8/15/2012 6 comments
There is no point in having a computation block process data faster than it can realistically access that data, or faster than any results can be transferred out of the block.
Ask Adam: UART, SPI, I2C & More
Adam Taylor 8/14/2012 19 comments
In this mini-series I will be exploring the UART, SPI, and I2C communications protocols, explaining their histories, pros and cons, and typical uses. Also, I will be discussing how to implement these protocols inside an FPGA.
FPGA-Based PCB Verification
Max Maxfield 8/7/2012 16 comments
Board verification is a task no one likes and one fraught with problems, like "Who will be in charge of writing the test software?" Here's one solution.
The Basics of FPGA Mathematics
Max Maxfield 8/7/2012 30 comments
All Programmable Planet blogger Adam Taylor has many Xcell Journal articles to his name on the use of FPGAs in critical systems and all sorts of things.
Verification in a High-Level Synthesis Flow
Brian Bailey 8/1/2012 8 comments
When putting together a virtual prototype that can be used for software development, the principle requirements are that it executes fast and that it can consume the same code that would be executed on the final product.
My goal is to hold a chess-playing extravaganza at Design West 2014, in which FPGA-based and/or MCU-based "Robots" compete for a grand prize.
In addition to applications for reprogrammable hardware and processors in the Internet of Things, it also seems as if there will be a growing need to embed pieces of FPGA-like fabric into SoCs.
Colors are simply names we give to specific wavelengths or combinations of wavelengths that are received by our eyes. Maybe we each see colors differently.
Now we are ready to bring all the parts together and construct the GPS-driven, FPGA-decoded Nixie tube speedometer for use in a 1953 International pickup truck.
Here's an image of the week and a joke of the week. Also, this week's live online chat takes place Thursday, June 20, at 1:00 p.m. ET (10:00 a.m. PT).