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Content posted in August 2012
Punched Cards With Round Holes
Max Maxfield  
8/31/2012   14 comments
Although we all know that punched cards were used to store computer data in the not-so-distant past, there's always something new to learn...
Jurassic HDL: Robots Nowadays – Machines or What?
Ken Boyette  
8/31/2012   8 comments
Ken Boyette has worked around machines all his life, but he's having trouble with the idea of interacting with them the way one would interact with another person.
Ask Max: Wroting Inglish
Max Maxfield  
8/30/2012   76 comments
If someone sends me an email saying, "Your an idiot," this does not convey the message they were hoping for...
Reliability of FPGA Designs
William Murray  
8/30/2012   10 comments
When one creates a hardware design from scratch, as is essentially the case when using a programmable logic device/platform, hardware reliability becomes a critical issue.
VHDL Puzzle Contest
Max Maxfield  
8/30/2012   15 comments
To celebrate the launch of his LogicStart MegaWing, the creator of the low-cost Papilio FPGA Development Platform is hosting a VHDL Puzzle Contest based on a conundrum posed by the author of a free VHDL book.
FPGAs for Power Control: What Are Today's Challenges?
Warren Miller  
8/29/2012   3 comments
By integrating more timing, sequencing, and monitoring capabilities, designers have the ability to implement reliability-focused features like failure detection, fault logging, margining, and trimming.
Verification in a High-Level Synthesis Flow, Part 2
Brian Bailey  
8/29/2012   10 comments
We need to verify computation and communication functions together as a single entity. Although there will be some amount of slowdown, this model will still likely be orders of magnitude faster than the resultant RTL model.
Don't Miss This Week's Live Chat!
Max Maxfield  
8/28/2012   10 comments
This week's live online chat takes place on Thursday, August 30, at 1:00 p.m. Eastern Time.
The Memory (R)evolution
Sven Andersson  
8/28/2012   51 comments
ASIC and FPGA designer Sven Anderson continues his "Retrospective" series with reflections on the (r)evolution he's seen with regard to computer memories.
Discovering FPGAs: Getting to Grips With ChipScope
Duane Benson  
8/27/2012   14 comments
Having resolved his licensing issues, Duane manages to get the ChipScope virtual logic analyzer up and running, so he can start to observe the signals changing inside his FPGA.
Jurassic HDL: A Gray Code Counter
Ken Boyette  
8/24/2012   14 comments
The little 4-bit Gray code counter presented here can easily be scaled up to whatever size you require...
Building Our FPGA-Based World Globe Display
Max Maxfield  
8/24/2012   16 comments
I'm thinking of a 3D spherical display that's about three feet in diameter, which would be big enough to be interesting while remaining modest enough for home use...
Jurrasic HDL: Do PALASM, CUPL, or ABEL Ring a Bell?
Ken Boyette  
8/23/2012   30 comments
If you use Google a bit, you can find all sorts of information about both ABEL and CUPL. You might even get off your high horse as a result.
Ask Max: FPGAs & DSPs
Max Maxfield  
8/23/2012   30 comments
The thing that often trips people up is that you don't actually need a digital signal processor to perform digital signal processing activities.
FPGAs for Power Control: Where Have We Been?
Warren Miller  
8/22/2012   3 comments
Circuit board designs have evolved from a single 5V supply to multiple voltages and devices that must be powered up in sequence with different ramp rates.
FPGA-Controlled Flying Scooter?
Max Maxfield  
8/22/2012   49 comments
I can so see myself riding one of these little beauties through my neighborhood. My 17-year-old son and his friends would be so envious.
Don't Miss This Week's Live Chat!
Max Maxfield  
8/21/2012   3 comments
This week's live online chat takes place on Thursday, August 23, 2012, at 12:00 p.m. Central Time.
Jurassic HDL: A Single-Bit Processor, Part 3
Ken Boyette  
8/21/2012   7 comments
In this column, KenwickVS (a.k.a. Ken Boyette) walks us through the VHDL code for his interpretation of the famous Motorola MC14500B single-bit processor.
Ask Adam VHDL: Handling the Don't Care Value
Adam Taylor  
8/20/2012   17 comments
Although the "-" (Don't Care) value is usually employed as an output assignment, it can be used as an input to a comparison operation, if you know what you are doing...
Discovering FPGAs: Alternative Latching Strategies
Duane Benson  
8/20/2012   34 comments
Duane modifies his previous program to latch the value on the 7-segment display while leaving his four-bit counter display running.
Heteromorphic Hobby Projects
Max Maxfield  
8/17/2012   18 comments
Duane is working on his Robot Avatar project, and Ed is creating an electronic computer using only technology that was available in 1900 or earlier, but what about the other members of All Programmable Planet?
The Openness of Open-Source Hardware
Mike Field  
8/17/2012   19 comments
Mike Field (a.k.a. Hamster) says open-source fundamentalists make his blood boil.
Ask Adam VHDL: Logic Values
Adam Taylor  
8/16/2012   14 comments
A VHDL signal that uses the "std_logic_1164 package" can undertake one of nine different values. But why does a signal that spends the majority of its time as a 0 or 1 need seven other values to accurately represent its behavior?
1Gbit/s WiFi – White Space Communications via FPGA
William Murray  
8/16/2012   9 comments
The ability of FPGAs to perform processing in parallel makes them particularly attractive for "white space" communications, because multiple channels can be dynamically loaded into the FPGA's logic based on current conditions.
Low-Power FPGAs: What Will the Future Look Like?
Warren Miller  
8/15/2012   3 comments
Are there any low-power features from MCUs, ASSPs, and ASICs that can be migrated to FPGAs? Are there any features not available on MCUs, ASSPs, and ASICs that could benefit FPGAs?
Connecting Computation & Communication
Brian Bailey  
8/15/2012   6 comments
There is no point in having a computation block process data faster than it can realistically access that data, or faster than any results can be transferred out of the block.
Why PicoBlaze? Implementing a UART
Paul Clarke  
8/14/2012   14 comments
We add a UART (universal asynchronous receiver/transmitter) to our FPGA-based eight-bit PicoBlaze soft processor.
Ask Adam: UART, SPI, I2C & More
Adam Taylor  
8/14/2012   19 comments
In this mini-series I will be exploring the UART, SPI, and I2C communications protocols, explaining their histories, pros and cons, and typical uses. Also, I will be discussing how to implement these protocols inside an FPGA.
Don't Miss This Week's Live Chat!
Max Maxfield  
8/14/2012   2 comments
This week's live online chat takes place on Thursday, August 16, 2012, at 1:00 p.m. ET.
Discovering FPGAs: The ChipScope Virtual Logic Analyzer
Duane Benson  
8/13/2012   9 comments
Microprocessor expert Duane Benson is learning about FPGAs from the ground up. In this installment, he takes a look at the ChipScope virtual logic analyzer.
A More Sophisticated FPGA-Based VGA Display
Adam Taylor  
8/10/2012   21 comments
This more sophisticated implementation of an FPGA-based VGA display uses external Double Data Rate 2 (DDR2) DRAM to store a downloaded image and then display that image on a screen.
Ask Max: Verilog & VHDL, Part 3
Max Maxfield  
8/9/2012   69 comments
Programming languages like C and C++ are very different in nature to hardware description languages (HDLs) like Verilog and VHDL.
I'll See You at the APP Virtual Water Cooler
Max Maxfield  
8/8/2012   2 comments
Our weekly live online chats allow us all to bounce ideas off one another, share stories about current projects, and trade the occasional joke.
Low-Power FPGAs: Today's Challenges
Warren Miller  
8/8/2012   4 comments
Today's FPGA customers are becoming much more focused on the efficiency of the FPGA – in particular, on power versus performance.
FPGA-Based PCB Verification
Max Maxfield  
8/7/2012   16 comments
Board verification is a task no one likes and one fraught with problems, like "Who will be in charge of writing the test software?" Here's one solution.
The Basics of FPGA Mathematics
Max Maxfield  
8/7/2012   30 comments
All Programmable Planet blogger Adam Taylor has many Xcell Journal articles to his name on the use of FPGAs in critical systems and all sorts of things.
Don't Miss This Week's Live Chat!
Max Maxfield  
8/7/2012   5 comments
This week's live online chat takes place on Thursday, August 9, 2012, at 12:00 p.m. Central Time.
What Will Future Flagship FPGAs Look Like?
Paul Dillien  
8/7/2012   19 comments
What features will we see in future FPGA devices? What tools will we need to design them? And how big will a team have to be to complete a design?
Discovering FPGAs: Driving a 7-Segment Display
Duane Benson  
8/6/2012   28 comments
In this column, Duane adds a binary to seven-segment decoder to the binary counting configuration we've seen previously.
Printable Hardware: FPGA's Role in DIY Fabrication
Chris Taylor  
8/6/2012   20 comments
As versatile and accessible as home fabrication has become, there remains an enormous hurdle: DIY semiconductor chip fabrication.
FPGA-Based World Globe Display
Max Maxfield  
8/3/2012   81 comments
Using this device, we could display images and animations and videos of all sorts of things.
What to Look for When Selecting Third-Party IP, Part 1
Jacek Hanke  
8/2/2012   37 comments
The use of IP cores can bring you measurable benefits in a variety of ways. This is if you choose the right cores from the right vendors. The alternative – if you acquire "bad IP" – is to waste time, increase costs, and maximize risks.
Synthesizing for Low Power in FPGAs
William Murray  
8/2/2012   9 comments
Many FPGA designers are unaware that there is an option to "Synthesize for Low Power" buried in the settings of most of the current synthesis tools.
FPGAs & Low Power: Where Have We Been?
Warren Miller  
8/1/2012   15 comments
In this column, I'm starting a mini-series on the future of FPGAs and low power. We will start by considering where we've been...
Verification in a High-Level Synthesis Flow
Brian Bailey  
8/1/2012   8 comments
When putting together a virtual prototype that can be used for software development, the principle requirements are that it executes fast and that it can consume the same code that would be executed on the final product.




latest blogs
We consider complementary versus analogous colors and the meaning of terms like shade, tint, and hue. We also introduce the concept of psychological primary colors.
This "retrospective" blog describes how I became involved in testing microprocessors in 1976, and how microprocessors have influenced my professional work for many years...
The appellation "primary colors" refers to a small collection of colors that can be combined to form a range of additional colors, but which "small collection of colors" should we use as our primaries?
Today's FPGAs already integrate a substantial amount of "stuff" (MCU cores, programmable fabric, on-chip memory, etc.), so what's left to integrate and why is this being left for the future?
To celebrate Geek Pride Day, Sylvie Barak has created a mega-cool infographic that depicts how geeks have been building the Internet since 1832.
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