Discovering FPGAs: Using a Software Simulator
Duane Benson 2/18/2013 23 comments
In the context of electronic design automation (EDA), a software simulator is an application written in software that is used to simulate the operation (the function and/or timing) of an electronic device or system.
Discovering FPGAs: Returning to VHDL, Part 2
Duane Benson 2/4/2013 74 comments
If there were a choice in both VHDL and Verilog, would you prefer to keep your signal declarations all in one place, or spread them throughout the HDL code, declaring them near to where they are used?
Discovering FPGAs: Returning to VHDL
Duane Benson 1/28/2013 54 comments
Not knowing VHDL makes it much more difficult to translate help given by non-Verilog users, so I've decided itís time to go back in time and see what I can do with VHDL.
Discovering FPGAs: Using the SPI Interface
Duane Benson 11/27/2012 49 comments
After everything I've done with my FPGA thus far, I'm itching to move a little further into the chip, which I will do by taking a look at an SPI (serial peripheral interface) bus interface.
Discovering FPGAs: De-Bouncing Around
Duane Benson 11/19/2012 58 comments
The common de-bounce methodology, as I used it in my earlier column, can cause annoying delays for the user. So in this blog we implement an alternative approach that provides the user with an instant result.
Discovering FPGAs: Powering-Up My Papilio
Duane Benson 11/5/2012 26 comments
My Spartan 6 FPGA development board won't have enough I/Os for my robot avatar. I'm thinking that my Papilio's 48 I/Os will get me a lot further than the Spartan 6 LX9's 16 accessible pins.
Discovering FPGAs: Becoming a Clock Wizard
Duane Benson 10/22/2012 19 comments
There are quite a few basic FPGA features that I still need to learn, and clocking is probably one of the more important. Thankfully, Xilinx has a lot of good tutorials and wizards, including the Clock Wizard.
Discovering FPGAs: Selecting a Syntax
Duane Benson 9/24/2012 13 comments
I now realize that I didn't have a good understanding of "instantiation" in my head when I wrote my recent Modules in Modules blog. This is somewhat ironic, because instantiation was pretty much the point of the blog.
Discovering FPGAs: Loading the .BIT File
Duane Benson 7/16/2012 28 comments
Microcontroller expert Duane Benson learns all about FPGAs using a Xilinx Spartan-6-based development board. In this installment, Duane walks us through the process of loading the .BIT configuration file into the FPGA.
Discovering FPGAs: Creating the .BIT File
Duane Benson 7/9/2012 28 comments
Microcontroller expert Duane Benson learns all about FPGAs using a Xilinx Spartan-6-based development board. In this installment, Duane walks us through the process of creating the .BIT configuration file.
Discovering FPGAs: Bringing Up the IDE
Duane Benson 7/2/2012 12 comments
Microcontroller expert Duane Benson learns all about FPGAs using a Xilinx Spartan-6-based development board. Thus far, Duane has been working in command-line mode. In this issue, he brings up the supplied IDE (integrated development environment) for the first time.
Discovering FPGAs: More About the UCF
Duane Benson 6/19/2012 11 comments
Microcontroller expert Duane Benson learns all about FPGAs using a Xilinx Spartan-6-based development board. In this issue, Duane examines the contents of the UCF (user constraint file) in more detail.
Discovering FPGAs: Flashing the LEDs
Duane Benson 6/11/2012 33 comments
Microcontroller expert Duane Benson learns all about FPGAs using a Xilinx Spartan-6-based development board. In this issue, Duane manages to get the light-emitting diodes (LEDs) on his development board to flash.
To celebrate Geek Pride Day, Sylvie Barak has created a mega-cool infographic that depicts how geeks have been building the Internet since 1832.
When traversing serial links with optics or backplanes, high-speed signals are degraded by impairments in the link, such as insertion loss, reflections, crosstalk, and optical dispersion.
Can statistical or heuristic verification really work for FPGA designs?
One of the things I've been wondering is whether or not the "okWireOR" module is really just a giant OR, or if the order in which things are attached matters.
I am shocked and horrified. It appears that those little scamps at Planet Analog are writing blogs pertaining to field-programmable issues.