Do you recall my recent blog about a personal supercomputer for only $100? I explained how Andreas Olofsson and his Adapteva team launched a Kickstarter project to raise $750,000. As I reported in a followup column at EE Times, they were successful. By the time the Kickstarter project automatically shut down, the total pledge amount was $898,921 -- almost $150,000 more than the original target. I pledged $99, and I cannot wait to receive my Parallella personal supercomputer and start playing with it.
The reason this is of particular interest on All Programmable Planet is that, as this illustration shows, the Parallella is based on the combination of two main chips: a Zynq All Programmable SoC from Xilinx (this site's sponsor) and an Epiphany processor array from Adapteva.
Block diagram of the Zynq-based Parallella personal supercomputer.
The interesting thing was that, almost immediately after I'd published my original blog on the Parallella, Bob Elkind commented, "Any real application requires gobs of memory bandwidth and gobs of storage bandwidth." Several other people have said the real limiting factor may be how fast you can transport data from external memory into the Zynq and back and forth between the Zynq and Epiphany devices.
So I was really interested in the latest APAX offering from Samplify Systems. APAX is a universal encoder/decoder IP core that can be deployed in ASIC and FPGA designs to dramatically reduce memory storage requirements and accelerate memory, input/output, and storage throughput.
In typical memory-bound applications, like high-performance computing (HPC) systems, only 10 percent of the time is spent actually performing computations. The other 90 percent of the time, the system twiddles its metaphorical thumbs waiting for operands to arrive. Using APAX can improve the situation. In fact, APAX cores can be deployed all over the place. Consider this illustration of a general-purpose computer system. The small boxes with triangles indicate somewhere APAX is applicable.
APAX for computing.
At this week's ARM TechCon 2012 conference in Santa Clara, Calif., the folks from Samplify demonstrated APAX running on a Zynq, as shown below. APAX comes equipped with a software driver that is written in ANSI C and runs under Linux.
APAX for the Zynq All Programmable SoC.
As soon as I heard about this while I was chatting with the folks from Samplify, a little light went on in my head, and I thought "This is ideal for the Parallella." In addition to speeding up data throughput between the Zynq and the external DRAM, APAX could be used to increase Zynq-Epiphany communications.
I love it when things come together this way. Do you think this technology could be used to address any memory bandwidth and storage bandwidth issues associated with the Parallella?
Yes, Samplify offers APAX in encrypted netlist form for Xilinx and Altera FPGAs (few thousand 6-LUTs), and as a CMOS IP block (approx 220k gates). If interested, please e-mail your contact info to awegener at samplify dot com for further discussions.
Yes I was thinking about it the other day, as they say its fine for big lumps of data where you can set an acceptable level of loss in the compression, I havent had a play on the website yet, but i shall have a look.Aparently they have electricity and everything over in the colonies now.
Duane Benson 11/6/2012 1:40:24 AM User Rank Blogger
Memory wall
I guess I should have put the comment that I put on your prior blog about this subject, here on this blog.
I was pondering the idea of using FPGA style routing to create different sized RAM banks for each processor based on what they are doing. I'm sure a 32 bit or 64 bit data or address bus could be made much faster in hard hardware, but I could see it being pretty speeding with an FPGA too.
Samplify will exhibit at the Supercomputing conference SC12 in Salt Lake City, Utah, USA, on 12 - 15 November 2012. Here's a link to that show:
http://sc12.supercomputing.org/
Samplify will exhibit at SC12 - please visit us at Booth #4151.
Samplify's CEO Allan Evans was intereviewed by the web site insideHPC (Rich Brueckner). Here's a link to that interview, describing Samplify's APAX Profiler software and APAX SDK, which allows anyone with Big [Numerical or Science] Data to move and store such data faster, easier, and cheaper, by a factor between 2x and 10x:
Samplify APAX Compression Lowers Cost of Big Science (29 Oct 2012)
http://insidehpc.com/index.php?s=Samplify+APAX
Finally, here's a video from ARM Technology Conference (Santa Clara, CA, USA; 31 Oct - 1 Nov 2012) showing APAX IP block (RTL; Verilog) running on the new Xilinx Zynq FPGA (two ARM Cortex-A9 microprocessors + the Kintex-7 FPGA fabric), in an image processing application:
http://www.youtube.com/watch?v=1HgjQMN5RlE
Hope this gives everyone a better idea of why Samplify is so excited about APAX software, the APAX Profiler, and reducing numerical bandwidth and storage bottlenecks for high-performance computing (HPC), Nvidia CUDA, GPGPU, and Intel Xeon Phi.
I am from England we have noo ideawhen thanksgiving is
I think it's some thing they do in the colonies right :p~~~~~
I think it's something to do with us deciding we were better off at home, that's what I was told anyway
Yes, of course. Before Thanksgiving 2012, folks who'd like to explore how APAX numerical encoding performs on their integer and floating-point data can upload their datasets to Samplify's web site and then see the rate-correlation curve of their APAX-decoded data, at an operating point recommended by the APAX Profiler.
Users can thendrag-and-drop the operating point while the other 3 Profiler windows display updated results at that new operating point.
One of the four Profiler windows includes a text summary of 18 different similarity (correlation) metrics, so they can choose the metric that best suits their notion of "good enough."
When they're done profiling, users can get the final results via e-mail that includes three download links to:
* a pdf of the final Profiler screen (4 windows),
* a download link to the final, decoded data, and (of course),
* a download link to the APAX Explorer product (free for 30 days).
Ooh I've done audio stuff at solid state logic and I know sound engineers have annoyingly good hearing, so do your customers get to play with evaluations?
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