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Duane Benson

Discovering FPGAs: Opening the Package

Duane Benson
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Duane Benson
Duane Benson
5/29/2012 1:21:56 PM
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Re: Promotion for Duane
Newbie or novice doesn't really matter to me. I'm just facinated by this new world. I'm still very much in the realm of not even being close to knowing how much I don't know. At least I know that I don't know how much I don't know.

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Max Maxfield
Max Maxfield
5/29/2012 8:42:09 AM
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Re: Promotion for Duane
@Brian: "I say let's promote Duane from FPGA newbie to FPGA novice."

I agree -- we'll just have to wait for the official T-Shirt to come in to make it official -- in the meantime, Duane, feel free to write "FPGA Novice" on your forehead with an indelible pen (grin)


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Adam Taylor
Adam Taylor
5/29/2012 5:55:18 AM
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Re: Bring Up
Glad your enjoying it, mine is hopefully in the post..

Hopefully you will have a top level entity for your code which corresponds with the UCF file. For your developments if you use this and assign the entity outputs to 1 or 0 as required then you should avoid floating inputs on the perhiperal devices. That way within your architecture you are free to experiment with your code without having to worry about stressing anything,

Has anyone explained the difference between signal and variables behaviour yet ?

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Brian
Brian
5/29/2012 1:34:35 AM
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Promotion for Duane
Hi Max,

"When we last left our intrepid FPGA newbie, Duane"

I say let's promote Duane from FPGA newbie to FPGA novice.  Since he now has an eval board and some experience, it is warranted  :-)

As for myself, I am still a newbie and plan to continue learning through Duane's experiences (and posts... :-)

 

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Max Maxfield
Max Maxfield
5/28/2012 10:12:59 PM
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Which design tools option to use...
@Duane. I checked with the folks at Xilinx and they say you made the right choice with Option 1 - ISE WebPACK

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Duane Benson
Duane Benson
5/28/2012 7:56:39 PM
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Re: Bring Up
Re those other tools... My head is spinning enough already. :-)

I will be very interested at looking at more tools at some point though. The inside the chip logic analyzer is quite intriguing. It blows my mind and makes perfect sense at the same time. These FPGAs are pretty fun.

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Duane Benson
Duane Benson
5/28/2012 7:53:43 PM
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Re: Bring Up
Adam - I'm very impressed with this little board so far. But this is really a complete new world for me. It's a bit staggering. I have been blinking some LEDs since this post, but to date only as a modification of one of the sample configurations.

Thanks for the note about floating inputs. That makes sense, although, I'm not sure I have the context in my head yet.

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Max Maxfield
Max Maxfield
5/28/2012 3:42:10 PM
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Re: Bring Up
@Adam: If only I was on commission (grin)

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Adam Taylor
Adam Taylor
5/28/2012 3:28:01 PM
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Re: Bring Up
@Max, thats twice in two days this site has made my buy something ;)

looking forward to its arrival 

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Max Maxfield
Max Maxfield
5/28/2012 12:58:56 PM
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Re: Bring Up
@Adam: Re "unused IO connections" -- this is a VERY good point -- thansk for sharing it.


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<<   <   Page 2 / 3   >   >>
More Blogs from Duane Benson
Duane has decided that the time is ripe to get his ZedBoard bolted onto his robot with a Linux distribution up and running. That was the ultimate plan anyway, so why wait?
Now it's time to delve deeper into the state machine I'm using to control my I2C interface.
The three states associated with bi-directional "inout" pins can cause confusion for the unwary.
It's time to jump into unexplored territory -- the state machine that will control Duane Benson's I2C interface.
We're now ready for the I2C master to transmit a command set to a remote device.
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