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Discovering FPGAs: Opening the Package
5/28/2012

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The Avnet Spartan-6 LX9 FPGA MicroBoard.
The Avnet Spartan-6 LX9 FPGA MicroBoard.

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Adam Taylor
Adam Taylor
5/28/2012 6:59:31 AM
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Bring Up
That looks like a pretty nice little board. Hopefully it should not take you to long to get your FPGA hello world program working. I would suggest perhaps attempting to one of the LEDs flashing, as that will prove you are using the clocks, resets correctly and you have the not only your simple code working but also the UCF file correct.

Webpack is good, and you can download it from the Xilinx website. Does it come with a good VHDL simulator like Modelsim? You really need to be able to simulate your code before you try to implement it.

As you get more into FPGA development you may wish to look at other synthesis tools like precision and synplify.

What may be of use for debugging your designs later on is an in chip logic analyser like chip scope it is really worth its weight in gold.

 

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Adam Taylor
Adam Taylor
5/28/2012 7:29:43 AM
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Re: Bring Up
I should also add be careful with the unused IO connected to perhiperals when you write your basic "hello world" code as it will probably not use all of the perihpehals (if any) connected to the FPGA. You will need to ensure that you have these IO correctly driven (static high or low at the top level of your code) to ensure you do not have floating inputs on perihperals which wil increase their power dissipation and possibly damage them.

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Max Maxfield
Max Maxfield
5/28/2012 12:58:56 PM
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Re: Bring Up
@Adam: Re "unused IO connections" -- this is a VERY good point -- thansk for sharing it.


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Duane Benson
Duane Benson
5/28/2012 7:53:43 PM
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Re: Bring Up
Adam - I'm very impressed with this little board so far. But this is really a complete new world for me. It's a bit staggering. I have been blinking some LEDs since this post, but to date only as a modification of one of the sample configurations.

Thanks for the note about floating inputs. That makes sense, although, I'm not sure I have the context in my head yet.

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Adam Taylor
Adam Taylor
5/29/2012 5:55:18 AM
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Re: Bring Up
Glad your enjoying it, mine is hopefully in the post..

Hopefully you will have a top level entity for your code which corresponds with the UCF file. For your developments if you use this and assign the entity outputs to 1 or 0 as required then you should avoid floating inputs on the perhiperal devices. That way within your architecture you are free to experiment with your code without having to worry about stressing anything,

Has anyone explained the difference between signal and variables behaviour yet ?

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Duane Benson
Duane Benson
5/29/2012 1:26:18 PM
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Re: Bring Up
Adam - I have been looking into the UCF file. The one in the sample code I'm experimenting with only has four pin definition entries.

When you say "...You will need to ensure that you have these IO correctly driven...", are you referring to just the pins that have a definition line in the UCF file or all of the pins on the FPGA that could be set to be I/O?


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Adam Taylor
Adam Taylor
5/29/2012 1:36:38 PM
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Re: Bring Up
Just the pins which are connected between the FPGA and any peripheral inputs, as it is a small board there might not be that many. 

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Duane Benson
Duane Benson
5/29/2012 2:12:01 PM
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Re: Bring Up
Adam - Thanks. That makes sense. There's only a handful of those on the Spartan-6 board.

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Max Maxfield
Max Maxfield
5/28/2012 12:57:23 PM
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Re: Bring Up
@Adam: It really is a nice little board -- I have one myself.

Re using Precision Synthesis from Mentor and/or Synplify Synthesis from Synopsys ... let's get him up and running with the Xilinx tools first (grin).

Re using ChipScope (Duane, this allows you to use some of the FPGA's programmable logic resources to implement virtual logic analyzers inside the FPGA) ... this is a great idea ... but probably a few weeks down the road :-)

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Adam Taylor
Adam Taylor
5/28/2012 3:28:01 PM
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Re: Bring Up
@Max, thats twice in two days this site has made my buy something ;)

looking forward to its arrival 

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Max Maxfield
Max Maxfield
5/28/2012 3:42:10 PM
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Re: Bring Up
@Adam: If only I was on commission (grin)

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Duane Benson
Duane Benson
5/28/2012 7:56:39 PM
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Re: Bring Up
Re those other tools... My head is spinning enough already. :-)

I will be very interested at looking at more tools at some point though. The inside the chip logic analyzer is quite intriguing. It blows my mind and makes perfect sense at the same time. These FPGAs are pretty fun.

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Max Maxfield
Max Maxfield
5/28/2012 10:12:59 PM
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Which design tools option to use...
@Duane. I checked with the folks at Xilinx and they say you made the right choice with Option 1 - ISE WebPACK

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Brian
Brian
5/29/2012 1:34:35 AM
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Promotion for Duane
Hi Max,

"When we last left our intrepid FPGA newbie, Duane"

I say let's promote Duane from FPGA newbie to FPGA novice.  Since he now has an eval board and some experience, it is warranted  :-)

As for myself, I am still a newbie and plan to continue learning through Duane's experiences (and posts... :-)

 

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Max Maxfield
Max Maxfield
5/29/2012 8:42:09 AM
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Re: Promotion for Duane
@Brian: "I say let's promote Duane from FPGA newbie to FPGA novice."

I agree -- we'll just have to wait for the official T-Shirt to come in to make it official -- in the meantime, Duane, feel free to write "FPGA Novice" on your forehead with an indelible pen (grin)


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Duane Benson
Duane Benson
5/29/2012 1:21:56 PM
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Re: Promotion for Duane
Newbie or novice doesn't really matter to me. I'm just facinated by this new world. I'm still very much in the realm of not even being close to knowing how much I don't know. At least I know that I don't know how much I don't know.

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Max Maxfield
Max Maxfield
5/29/2012 1:27:33 PM
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Re: Promotion for Duane
@Duane: "At least I know that I don't know how much I don't know."

Are you sure? (grin)


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Paul A. Clayton
Paul A. Clayton
5/30/2012 6:42:04 PM
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Beginner
Open design content
There might be some interest in Open Cores.  (Not having any knowledge or experience in logic design I do not know if the projects hosted there are especially good, but the site might be a useful resource [or not].)

GitHub might also have some projects of interest.

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Adam Taylor
Adam Taylor
5/30/2012 7:01:07 PM
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Re: Open design content
Open cores is very good as is the free model foundary which does component level models for system level test benching. 

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Warren Miller
Warren Miller
5/31/2012 12:53:29 PM
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Easier to Use Micro/PicoBlaze MCU or Verilog?
It will be interesting to see if you find it easier to blink an LED using MicroBlaze/PicoBlaze or writing code in Verilog/VHDL. Do you have any experience with Verilog/VHDL? If not, that will be another big learning curve. Start slow and only dig into what you need to for your initial program. Using examples as a starting point (known good ones) is always a big help...

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Duane Benson
Duane Benson
5/31/2012 12:57:43 PM
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Re: Easier to Use Micro/PicoBlaze MCU or Verilog?
Warren - I'm an absolute rookie with VHDL and Verilog - with FPGAs in general. Based on what I've learned so far, I'm thinking it will be easier to blink an LED in an MCU. What I'm looking forward to though, is verifying my assumption that the FPGA will be able to blink a lot of LEDs, or do other functions, at the same time.

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Karl
Karl
5/31/2012 2:47:01 PM
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Re: Easier to Use Micro/PicoBlaze MCU or Verilog?
Duane, here is a tutorial that was useful when I jumped into Verilog.  It has a "Verilog in one day" with simple examples of basics.

http://www.asic-world.com/verilog/veritut.html

One confusing but important thing is "blocking" vs "non-blocking" assignment.  A paper by Cliff Cummings is great.

http://www.sunburst-design.com/papers/CummingsSNUG2000SJ_NBA.pdf

Something I have not tried is compiling Verilog with the Model_Sim simulator to do a quick simulation.  That should be useful if going thru the whole design process is too slow for future projects.  Probably no problem with your board.

To blink an LED should be as simple as add an output pin to drive the LED then add a T flip-flop then connect its output to the output pin.

To control the blink rate use a counter and pick a bit that changes at the desired freguency as the toggle input to the flop.

Repeat as necessary to blink several at the same rate or mixed rates.

DON'T WORRY, HAVE FUN.

 

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Duane Benson
Duane Benson
6/6/2012 1:46:14 PM
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Re: Easier to Use Micro/PicoBlaze MCU or Verilog?
Karl - I briefly looked over that "Verilog in one day" site. It looks pretty good at first glance. I'll spend some time on it at somepoint and report back on how it works for me.

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More Blogs from Duane Benson
Now it's time to delve deeper into the state machine I'm using to control my I2C interface.
The three states associated with bi-directional "inout" pins can cause confusion for the unwary.
It's time to jump into unexplored territory -- the state machine that will control Duane Benson's I2C interface.
We're now ready for the I2C master to transmit a command set to a remote device.
Duane Benson has his SPI interface working. At some point, he'll want to rewrite the Verilog code, but first he wants to get the I2C interface up and running.
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