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William Murray

Learning FPGA-Based Communications Theory via Simulation

William Murray
geekyasa
geekyasa
1/30/2013 7:55:52 PM
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Beginner
Re: Other SciCos Tool Boxes and Projects
HART seems to be awesome but a bit expensive compared to other tools William

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William Murray
William Murray
11/11/2012 9:36:27 PM
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Some of these are good enough to send the author a bit for Beer
Some of these addons to SciLab are good enough to send the author a bit for Beer, or a donation to their favorite charity.

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William Murray
William Murray
11/11/2012 7:23:17 AM
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Re: Other SciCos Tool Boxes and Projects
No I have not -- have you looked around for other documentation on either of those -- they seem interesting --

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geekyasa
geekyasa
11/9/2012 10:43:20 PM
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Beginner
Re: Other SciCos Tool Boxes and Projects
Thank you fo the update William. Have you tried the HART Toolbox or RTSS ? I want to try out those two. Many say its the best out of the lot. Any advice ?

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William Murray
William Murray
11/9/2012 9:25:40 AM
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Other SciCos Tool Boxes and Projects

Scicos > Additional toolboxes and related projects 

  • Coselica  by Dr. Dirk Reusch provides basic Modelica blocks for Scicos. Currently there are some electrical (analog) and 1D-mechanical (translational, rotational) blocks, which have been derived from the Modelica Standard Library.

  • Modnum  is an open computational library for the modeling and the simulation of communication systems by Alan Layec. "MODulations NUMériques" provides also some sets of interfacing functions and blocks for Scilab/Scicos.  

  • oooark  This library aims at providing a uniform method for simulation, prototyping, and testing of autonomous robots. It also adheres to the object-oriented paradigm to ease system configuration and development.  

  • RTAI-Lab provides a palette with RTAI and Comedi blocks. With RTAI-Lab you can interface models to digital acquisition hardware and generate and compile hard real-time code. Main developer: Roberto Bucher at SUPSI, Switzerland. 

  • RTAI-XML. RTAI-Lab require a RTAI Linux full installation on both control and supervisor machine. With RTAI-XML server installed on the control machine, the supervising machine can use a simple Java-enabled web browser: JRTAILab is a Java Applet implementing a generic client for RTAI-XML. 

  • RTSS   is a Robotics Toolbox for Scilab/Scicos (RTSS) by Matteo Morelli. RTSS is inspired by the Robotics Toolbox for MATLAB written by Professor Peter I. Corke. 

  • SynDEx provides a framework to formally specify and analyze real-time, distributed, and embedded architectures. With SynDEx you can automatically compile Scicos models into executable code for complex multi-component architectures. Main developer: AOSTE team at INRIA, France.

  • Scicos-HDL  is a tool to design digital circuit (CPLD / FPGA) systems. Scicos-HDL (High level Description Language) provides palettes for combinatorial, sequential application specific IP blocks that allow to simulate and produce HDL code (Verilog or VHDL). 

  • HART Toolbox.  The Hardware Access in Real-Time Toolbox for Scilab/Scicos can be used to generate Scicos-blocks for hardware that have a C/C++ interface. The blocks can be used under Linux for soft and hard real time tasks (RTAI). Blocks are provided for DAQ (COMEDI). 

  • ScicosPowerLab.   Toolbox for electric machinery and power electronics under ScicosLab.  



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William Murray
William Murray
11/9/2012 9:15:04 AM
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Blogger
The SciCosHDL tool supports VHDL/Verilog code generation for some of these blocks
The SciCosHDL tool supports VHDL/Verilog code generation for some of these blocks

Features:
  • Links The Scilab/Scicos with the Digital circuit design(EDA).

  • Integrates the hardware circuit, algorithm and Scilab/Scicos environment as a plat for digital circuit design, simulation and Hardware Description Language generation.

  • Enables complex signal processing combined with powerful mathematical tools.

  • Inside libraries: Sequential logic library, Combinational logic library, Ipcore library, simulation library.

  • Support mixed-simulation with the Scicos blocks.

  • Automatically generates Description Language(SystemC ,VHDL and Verilog ).

  • Automatic propagation of signal names to generated HDL.

  • You can specify most values in the block parameter dialog boxes using Scicos workspace.

  • Mix-simulation with original Scicos blocks and Scicos-HDL blocks.

  • Open interface for users to add blocks.

  • Under GPL LICENCE.


http://scicoshdl.sourceforge.net/

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More Blogs from William Murray
Today's FPGAs already integrate a substantial amount of "stuff" (MCU cores, programmable fabric, on-chip memory, etc.), so what's left to integrate and why is this being left for the future?
When extreme thermal cycling causes circuit boards and chip packages and the silicon die in the packages to expand and contract at different rates, problems may ensue.
In order to simulate a design we need models that represent the functionality and timing characteristics of our design elements, but the timing aspects of these models may be based on uncertain data.
A large amount of skill is required to write custom test code for custom hardware. Even more skill is required to test a CPU, RAM, or ROM.
Designing high-temperature electronics can present many challenges for "down-hole" petroleum equipment, ovens and micro-waves, automotive, medical, aerospace, and other applications.
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