What is the involvement of Intel with programmable logic really all about? Two startup vendors, Achronix and Tabula, have indicated that Intel is acting as a foundry for them. After reading many column inches in the technical press, I remain unconvinced.
Foundries such as TSMC, UMC, and Toshiba have undoubtedly gained benefits from processing FPGA wafers for Altera and Xilinx (this site's sponsor). FPGAs are large and have regular structures that are highly visible to test machines. This allows foundries to locate any area of failure on a die quickly and efficiently during testing to debug their process. Of course, the foundries also benefit when Altera and Xilinx start selling the parts in volume.
Intel might want these benefits to "pipe-clean" its 22nm 3D Tri-Gate (i.e., FinFET) process. Foundries construct test chips with structures designed to verify that the process is meeting their design goals. That's different from processing low volumes of wafers filled with relatively unproven third-party designs for startups. Assuming Achronix and Tabula were successful, they would generate only a dribble of wafer revenue for Intel after a couple of years. Meanwhile, Intel would suffer disruption to its flagship production line by cooking a few wafers for foundry customers, while its own high-volume products like Ivy Bridge and Atom might be scrambling for that capacity.
There is speculation that Intel plans to acquire these FPGA companies, though its track record in breaking into new market sectors is not the best. Acquiring one or both of these small companies obviously would not provide access to a large customer base, but it would give Intel the potential for including programmable fabric in future products. This programmable fabric could be employed as high-speed I/O using Achronix asynchronous logic techniques, or perhaps as hardware-based acceleration for algorithms using the Spacetime technology developed by Tabula.
The barriers that would need to be overcome are significant. The design software for the programmable logic would need to be integrated into Intel's overall system design flow. Intel serves software engineers who write processor code. This market is different from the one for mainstream FPGA design tools, which would require an effective "C to gates" design flow that would look familiar to Intel users.
Intel has already combined an Atom die and an Altera die into a multi-chip package. Perhaps this is to check the validity of the concept in embedded applications. The target market is one where processors and programmable logic often co-exist, so the customers would have the skills to design with the combined product.
It is clear what the FPGA companies get out of this deal: leading-edge technology and the prestige of being associated with Intel. But do you really believe that Intel would offer the "crown jewels" from its investment in equipment and 22-nm FinFET development to a couple of new FPGA companies if doing so didn't support a more wide-ranging strategy?
My Free Lunch 7/19/2012 9:15:41 PM User Rank Beginner
Re: Very Interesting
One of the great things about ARM is its large collection of IP blocks that a customer can pick and choose from. They mix and match these IP blocs with ARM processor blocks and come up with the "perfect fit" in a single chip, it's just a "simple" matter of custom fabrication after that.
A knock against Intel, they don't allow you to put your own IP directly on the die with their processor, you have to glue your IP on externally (like through an FPGA). Sounds to me like Intel is working on creating a CPU plus FPGA combo chip that will allow customers to create their own "perfect fit", no custom fabrication necessary.
If these things (the FPGA) are speedy (both boot and runtime), secure and low power, it will give the ARM technique a run for the money. No need to work with capacity constrained contract fab houses, no need for the huge investment of spinning chips while working out the bugs, it sounds pretty sweet to me.
"I would have been less surprised, I guess, if Intel had signed up Xilinx."
Xilinx would have (I am guessing) demanded more manufacturing capacity and would probably be more upset about any schedule slips, increasing risk/pressure for Intel. With smaller production runs (and possibly less constrained timing) scheduling could be more flexible and interfere less with Intel's primary production.
The higher volume of Xilinx could also have introduced fewer learning opportunities. Intel is well-known for being very good at reducing cost for high volume. If it can become as good at reducing cost for lower volume chips, it could gain a significant competitive advantage even in x86 systems.
Achronix, Tabula, and Netronome might also provide more design diversity for a given volume than Xilinx, again increasing learning opportunities.
Achronix and Tabula may also have venture capital aspects (even a joint venture with Xilinx would not be quite the same).
Paul Dillien 7/12/2012 8:32:58 AM User Rank Blogger
Re: Very Interesting
Hi Adam. Yes, you hit the nail on the head when you said that software is the key. Intel has had both more and deeper relationships with software engineers and tool vendors than most, I guess. EDA vendors are always looking for ways to widen their customer base and they have been very active in what I called a "C to gates" design flow. Here's a thought. Perhaps Intel will acquire an EDA vendor (after all they purchased McAfee for over $7B). It would certainly help Intel if it is serious about being a leading foundry.
Paul Dillien 7/12/2012 8:18:16 AM User Rank Blogger
Re: Benefits to Intel
Hi Paul Clayton. You make some very interesting points. If Intel is taking the long view, then it may be thinking of keeping fabs filled for longer. The FPGA production demand peaks several years after first product release, and, say, four years from today the 22-nm process will be mature. Demand for FPGA product is also long-lived, as many parts shipped today have been around for over a decade. The comment about Intel learning to work with external engineering teams could also be on the mark. Working with "partner customers" who have different tools and flows would be a good prelude to wider foundry engagements. Clearly, anything that helps a foundry with efficiency savings would also be welcome news for Intel. There are persistent rumors that Intel has other, larger customers waiting to be announced. Your point about Intel hedging against a conservative strategy is something I had not considered, and would play well with investors. I would have been less surprised, I guess, if Intel had signed up Xilinx. (I doubt that they could lure Altera way from TSMC, as they have a long association working together). Xilinx, on the other hand, has flipped between Toshiba, IBM, UMC and Samsung in recent years. They only started with TSMC for 28-nm. Their differentiation from Altera at 28-nm revolves around the selection of which TSMC process they have chosen. In addition, Xilinx can offer proven volume. I enjoyed your final paragraph about Intel confusing competitors - they certainly confused me :) Even I just speculated that the TSMC/Xilinx relationship might be fragile - so am I helping Intel by spreading more FUD?
With the cost developing fabrication technology increasing, there is an incentive to increase the number of fabs. Intel's x86-related production may be insufficient to keep a larger number of fabs busy, so having additional (non-competing) chips to manufacture can help Intel economically. In addition, as a foundry Intel might be able to keep a given technology node active longer. (With so much x86-related chipset functionality being moved onto the x86 chip, there is less work for older process nodes. I suspect that even if chipset wafer count was not declining, there could be an advantage to Intel of taking up some foundry work on older process nodes.)
In addition, Intel is entering the SoC market which requires interacting with other hardware designers. Working with Achronix and Tabula (and Netronome) may help develop procedural skills needed for cooperation and help tweak process features and design tools (and the design techniques used by others) to enable use of third party design content.
There could also be an advantage in developing techniques to reduce the cost of lower volume parts and flexible production volumes. While such is clearly advantageous for foundry uses, such could also enable more specialization in Intel products and facilitate adjusting production volume after market feedback has become available.
Intel also has an incentive to take a venture capitalist role of supporting higher risk endeavors, if only to hedge against a too conservative strategy. Providing manufacturing could be less expensive than providing cash.
Intel might also benefit from confusing competitors (pushing them to try to be prepared for many possible moves from Intel), weakening foundry-designer relationships with uncertainty, or even causing others to brainstorm publicly for ways that Intel might profit. (Given that the competitors in the mobile space that Intel is trying to enter are generally dependent on foundry services, it could be to Intel's advantage to weaken such foundries. Subtle, indirect--even unintentional--FUD could be to Intel's advantage.)
Max Maxfield 7/11/2012 10:19:24 AM User Rank Blogger
FPGA Co-Processors
In a way this comes back to my Hardware Accelerators blog ( http://bit.ly/Nkhjpz ).
There have been serveral cases where you have a dual processor system (each processor possibly having multiple cores) and you take one processor out and replace it with an FPGA module. This is the basis of one form of what is known as High Performance Computing (HPC).
As Paul mentioned, there's already been a case of an Intel ATOM die and an FPGA die being mounted in the same package -- you can only increase processor performance by raising the clock frequency so high ... maybe Intel really are looking at buying an FPGA company ... and wouldn't it be an advantage to buy one that is (a) already compatible with the Intel foundary and (b) has paid for the privalage of being compatible...
Adam Taylor 7/11/2012 8:08:18 AM User Rank Blogger
Very Interesting
Paul,
A very interesting blog I will be interested to see where the FPGA / Processor develops. As with many things it is not producing the hardware that is the most difficult but producing the tool chain which supports the technology.It is crucial not to require to much of a step change for the developers already using tool chains for current developments.
As we have seen here with other blogs the change between SW and FPGA development can require diffferent mindset it would be good if the tool chain developed can as you say mask most of that.
Jacek Hanke 7/11/2012 3:06:23 AM User Rank Blogger
Re: Very Thought-Provoking
If Paul won't dissaper, this could be true. Intel with its fabs could still have some extra production capacity. First to check if FPGA could bring some $ for them and if succeed - then take uo these vendors.
Very interesting topic, Paul if you got something more, please share it with us.
All the evidence suggests that both static and dynamic power consumption will reduce significantly on a like-for-like basis for FPGAs using 20nm or FinFETs.
Xilinx has come up with a novel idea to reduce power consumption -- a new technique whereby the FPGA can test itself and then instruct the power supply to lower its core voltage.
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