What is the involvement of Intel with programmable logic really all about? Two startup vendors, Achronix and Tabula, have indicated that Intel is acting as a foundry for them. After reading many column inches in the technical press, I remain unconvinced.
Foundries such as TSMC, UMC, and Toshiba have undoubtedly gained benefits from processing FPGA wafers for Altera and Xilinx (this site's sponsor). FPGAs are large and have regular structures that are highly visible to test machines. This allows foundries to locate any area of failure on a die quickly and efficiently during testing to debug their process. Of course, the foundries also benefit when Altera and Xilinx start selling the parts in volume.
Intel might want these benefits to "pipe-clean" its 22nm 3D Tri-Gate (i.e., FinFET) process. Foundries construct test chips with structures designed to verify that the process is meeting their design goals. That's different from processing low volumes of wafers filled with relatively unproven third-party designs for startups. Assuming Achronix and Tabula were successful, they would generate only a dribble of wafer revenue for Intel after a couple of years. Meanwhile, Intel would suffer disruption to its flagship production line by cooking a few wafers for foundry customers, while its own high-volume products like Ivy Bridge and Atom might be scrambling for that capacity.
There is speculation that Intel plans to acquire these FPGA companies, though its track record in breaking into new market sectors is not the best. Acquiring one or both of these small companies obviously would not provide access to a large customer base, but it would give Intel the potential for including programmable fabric in future products. This programmable fabric could be employed as high-speed I/O using Achronix asynchronous logic techniques, or perhaps as hardware-based acceleration for algorithms using the Spacetime technology developed by Tabula.
The barriers that would need to be overcome are significant. The design software for the programmable logic would need to be integrated into Intel's overall system design flow. Intel serves software engineers who write processor code. This market is different from the one for mainstream FPGA design tools, which would require an effective "C to gates" design flow that would look familiar to Intel users.
Intel has already combined an Atom die and an Altera die into a multi-chip package. Perhaps this is to check the validity of the concept in embedded applications. The target market is one where processors and programmable logic often co-exist, so the customers would have the skills to design with the combined product.
It is clear what the FPGA companies get out of this deal: leading-edge technology and the prestige of being associated with Intel. But do you really believe that Intel would offer the "crown jewels" from its investment in equipment and 22-nm FinFET development to a couple of new FPGA companies if doing so didn't support a more wide-ranging strategy?