As I am sure you will recall from my Visions of the Future blog, I am in the process of talking to some of the visionaries of the programmable industry to get their ideas on 1) Where have we been? 2) What are today's challenges? and 3) Where might we end up in the next several years? This will provide the rest of us with a starting point for our own discussions, thoughts, and prognostications.
In my previous column, I posted comments from Navanee Sundaramoorthy, the Xilinx Embedded Platform manager, about where we have come from with regard to FPGAs/MCUs. Now, this blog continues with some of Navanee's thoughts on today's FPGA/MCU challenges. As usual, I have started a new message board for us to continue the discussion.
Breaking the MCU mindset
There are a couple of key challenges Navanee sees in the future that will need innovative responses. Some of these are an outcome from the transition to designers who are more MCU-centric. These users are not as familiar with FPGAs as they are MCUs. They are very experienced with MCU-oriented design flows and architectural thinking, but don't have deep (or maybe even any) FPGA experience. Thus, they approach the design of a combined FPGA/MCU device with traditional MCU thinking, which means they can easily miss out on some of the advantages FPGA fabric brings.
Let's consider a common scenario that illustrates this challenge. In the not-so-distant past, a traditional FPGA/MCU implementation would have involved the use of two individually packaged devices, an MCU and an FPGA. In many designs, the MCU needs a little more capability than it supports in its default configuration (maybe more SPI ports, some front-end data processing from an analog-to-digital converter, or a different bus interface), so the use of a companion FPGA would seem to "fit the bill." In a real-world design that is representative of this type of scenario, a parallel bus was used to connect the FPGA and the MCU, and the MCU then treated the FPGA as a peripheral. Although this approach easily fit into the MCU-oriented designer's mindset, it significantly limited the bandwidth of the ensuing system.
Even in situations where the MCU is embedded inside the FPGA as a hard core, many MCU-centric designers would be tempted to create an "old school" interface between these two facets of the device. However, today's state-of-the-art FPGA/MCU combo devices open up a wide range of architectural alternatives that break the standard MCU/peripheral mindset...
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