As I mentioned in an earlier column, I am currently in the process of talking to some of the visionaries of the programmable industry to get their ideas about:
- Where have we been?
- What are today's challenges?
- What will the future look like?
The idea is that this will provide the rest of us with a starting point for our own discussions, thoughts and prognostications.
In my previous blog, I talked about the recent history of low power in FPGAs, based on my discussion with Arif Rahman, an IC design architect at Altera. In this column, which is again based on my discussion with Arif, we will consider the challenges we face today. As usual, I have started a new message board for us to continue the discussion. Using the All Programmable Planet message boards is helpful, because we will eventually circle back to this topic (in future interviews or related blog posts), and these message boards will facilitate our picking-up the discussion from where we left off.
FPGA customers are increasingly "power aware"
If you don't think power is an issue for today's designs, you need look no further than at the recent projections from the Intelligent Energy Europe project. They project that, by 2015, the costs for the operation of servers will exceed the cost of the server hardware! Similar projections have made low power a key requirement for several segments of FPGA customers. Other segments will surely follow suit.
Arif explained that, in response to these projections, today's FPGA customers are becoming much more focused on the efficiency of the FPGA -- in particular, on power versus performance. For example, high-speed SerDes are critical high-performance elements in many designs, but customers don't want overall bandwidth to be limited by the FPGA power budget. Thus, metrics like power efficiency (measured in mWatt per Gigabit) of the SerDes channel are now more important than just Gigabits per second. Furthermore, customers are looking for SerDes implementations that can be scaled for lower power per channel when the highest performance data rates are not required. And SerDes channels that can be completely turned off, when not needed, can reduce power even more.
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