In this column, we continue our discussion of creating a chess-playing FPGA. I will continue the description of some of the logic used to determine the best move from a specific position on the chessboard. This section of logic generates the threat signals used in adjacent parts of the board as described in my previous post.
Generating chess moves
As we discussed last time, the algorithm used to identify the best move into a specific square is fairly simple. The logic examines all the possible attacks by enemy pieces into the square. We saw how the best move value could be determined by looking at all possible attacks and selecting the one from the lowest value piece as our best option.
One thing we didn't discuss was how the attack signals are to be generated. The diagram below illustrates how the attack signals can be generated from the value of the piece in the square. For example, if the piece is a king (K), the attack signals going to the squares above, below, to the left, to the right, and diagonal to it are activated. If the piece is a knight (N), only the attack signals going to the knight's possible destinations (up two and over one, down two and over one, left two and up or down one, and right two and up or down one) are activated.
Some of the pieces (the king, knights, and pawns) can move only to particular destination squares. Attacks by the other pieces (bishops, rooks, and queen) must be propagated along the row, column, or diagonal as appropriate. To figure this out, we need to look at the attacks entering the square.
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), I begin to see how the two approaches may not be so different. Ultimately, either design needs a way to detect its legal moves (especially regarding long moves by the queen, bishop, and rook), and your pass-through method certainly achieves that pretty efficiently. So, I think we may be looking at the same model, but from opposite ends of the stick.
