A couple of years ago, I interviewed the CEO of a small chip company called Adapteva about how they had put together a high-performance processor chip for under $2 million and taped out in only six weeks. Ever since that time, I have wondered about the conventional wisdom that a modern ASIC has to cost $30 to $40 million.
Then, at DAC2012, I ran into blogger JL Gray. After we had chatted for a while, he posed an interesting question: "Can you build a chip for $10,000?" He said that he meant designing and implementing the entire device, all the way to prototype, including any tools. Now, my initial reaction was that the cost point he proposed was ridiculous. However, knowing that building a chip could be achieved for much less than the conventional wisdom, I thought this would be an interesting topic to research.
Immediately after my chance encounter with JL Gray, I was scheduled to go visit the Arteris booth to talk some business. While there, I unexpectedly met the company CEO, Charles Janac, a serial entrepreneur and a really smart guy. My interview with him formally launched my quest for a "$10K chip." Take a look at the following video, and then let's get to some questions.
Charles had an interesting view of the future of FPGA design. He thinks it would be possible to create consumer products using low-end FPGA-based processors, rather than follow the route of manufacturing a full-on ASIC. Would such a move be a boon to the FPGA industry and reduce the cost -- while increasing the profitability -- of the subsequent products?
While I still think JL Gray's price point may be unrealistic, the concept of bringing in a prototype below six figures might actually be possible with a little "outside the box" thinking. A few low-end FPGAs plugged into a stock prototype board along with a few low-cost tools might make it happen. I'm going to take this on as a long-term project that will end up in a longer article, but your input here will be invaluable. Let's put our thinking caps on and tell me: What would you do to bring in a prototype with a budget of $10K? $100K? $900K?
Max Maxfield 6/18/2012 1:17:49 PM User Rank Blogger
An amazing story
Hi Lou -- thanks for this. Actually the Adapteva thing truly is an amazing story. Essentially one guy designed and build his own ASIC/SoC in his basement -- I wrote about it myself in an article "From RTL to GDSII in Just Six Weeks"http://bit.ly/LA3a3Z
Thanks for the video - these interviews are great.
Re: ""Can you build a chip for $10,000?" He said that he meant designing and implementing the entire device, all the way to prototype, including any tools."
That sounds like a pretty tough challenge. My first thought is that the designers work for free outside of their 'day job' and then have any development tools donated (think "sponsors"). That way, any funds are used for prototype hardware, design turns, etc.
Of course, the ROI for the designers would have to be post-production - so, their design efforts would need to be "an investment".
Those are my initial thoughts for stretching $10k to develop the entire device...
anysilicon 8/16/2012 8:04:16 AM User Rank Beginner
It’s the goal that drives us -very inspiring article
Very inspiring article
It's the goal that drives us.
Thank you for the article and I am definitely planning to touchbase with JL Gray on this topic.
I would like to comment only on the "GDSII to components" phase, which is very often not known to FPGA/VLSI engineers.
Meeting a 10K$ budget is unrealistic. The price structures of the phases after GDSII are:
(1) Maskset generation - this is becoming a very expensive process, especially today when companies are interested in 28nm process, the smaller the node gets the higher the price. 65nm tapeout cost is 6 digits 40nm tapeout cost is 7 digits.
(2) Package tooling - if the company is delivering packaged components, a package need to be design and production tooling need to be prepared. This price would be in the range of 4-5 digits.
(3) Test solution – a proper test solution has to be developed (SW+HW), either wafer sort of component test or both. This price range is 5-6 digits.
Would be happy to share more information via my email or website www.anysilicon.com
Re: It’s the goal that drives us -very inspiring article
Anysilicon, Of course it is an unrealistic number. That was something pulled out of the ether. But the concept of creating a chip for less than the current benchmark of $40 million or $20 million is curtailing innovation in the market and scaring investors away. And what we want to explore is the part to a prototype, not the finished product. There are companies that have brought chips to prototype for less than $2 million. And if that is possible, why not sub $1 million? It will take some digging and a willingness to think outside the box.
Re: It’s the goal that drives us -very inspiring article
@Lou: "And what we want to explore is the part to a prototype, not the finished product." Also in the blog FPGA based processors were mentioned.
Here are some thoughts:
1) A prototype should be programmable as much as possible.
2) Dedicated processors can be used to control peripherals using whatever protocol.
3) The processor has to be small and faster than typicall embedded cpu's.
4) The code footprint has to be small because of limited memory size.
5) Systems have typically been built using a bus that combined DMA and control protocol adapted/mapped to specific peripheral devices.
6) The peripherals can be verified using a one on one connection to a "driver" chip that sends and receives control info and data and does the required peripheral control.
7) Functional changes only require modification of program memory contents after the peripheral control is verified.
8) DMA block transfers to "system" memory are efficient for data and local control memory eases congestion and aids response time.
When industry giant Qualcomm and tiny startup Esencia were named "best of show" at ARM TechCon, Qualcomm didn't send anyone to collect their award at the keynote, but Esencia was there with bells on.
This is the challenge I place before you. Would it be possible to create an FPGA-based implementation of the Great Highland Bagpipes that has all the nuances of the real thing?
There are a number of reasons a system architect or design engineer might choose one FPGA vendor over another, but would there be some advantages to having a truly agnostic system foundation?
A small, French startup, Flexras, made a few waves at the 2012 Design Automation Conference (DAC) with an FPGA prototype partitioning tool called Wasga Compiler.
To save this item to your list of favorite All Programmable Planet content so you can find it later in your Profile page, click the "Save It" button next to the item.
If you found this interesting or useful, please use the links to the services below to share it with other readers. You will need a free account with each service to share an item via that service.
Tweet This
