A few days ago when I came home from work, I found a box sitting on top of my gumboots. Yes, it was the ZedBoard I'd been anxiously waiting for! As I'm sure you will recall, the heart of the ZedBoard is a Zynq-7000 All Programmable SoC, which combines a full hard core implementation of a dual ARM Cortex-A9 microcontroller subsystem (including floating-point engines, on-chip cache, counters, timers, etc.), coupled with a wide range of hard core interface functions (SPI, I2C, CAN, etc.), and a hard core dynamic memory controller, all augmented with a large quantity of traditional programmable fabric and a substantial number of general-purpose input/output (GPIO) pins.
In addition to the Zynq-7000 All Programmable SoC, the ZedBoard also boasts a bunch of memory (512MB of DDR3, 256Mb of Quad-SPI Flash, and a 4GB SD card); on-board USB-JTAG programming, 10/100/1000 Ethernet; USB OTG 2.0 and USB-UART; PS and PL I/O expansion; multiple display options (1090p HDMI, 8-bit VGA, 128 x 32 OLDE); and an I2S audio CODEC.
Sad to say, after ripping into the shrink-wrap like a possessed man and rooting through the box, I ended up being just little bit disappointed. This is because I desperately wanted to power the board up immediately, but I live in New Zealand and the plug pack did not have a faceplate to fit our local sockets. "Oh well," I told myself, "a trip to the store tomorrow will soon fix that." However, I did keep myself busy by uninstalling my existing ISE version and upgrading to the 14.2 version that was on the enclosed DVDs -- so much nicer than an overnight download from the Internet.
Hurray, my ZedBoard has arrived!
The next day I raced down to the store to purchase the appropriate power adapter. On returning home I thought to myself "So, where to start?" Well, being a user of Linux for 15 years, I couldn't resist firing up the ARM core and seeing how easy it is. After plugging in the included SD card and then attaching my PC to the USB UART interface, I powered up the board.
The first problem I ran into is that my laptop did not have the required Cypress USB drivers installed. Happy this wasn't a major concern; after registering with Cypress, a quick visit to the Cypress download area soon solved things. With this issue behind us, the ZedBoard booted up just like any other embedded ARM board and -- once booted -- I had a quick look around the Linux version on the SD card.
This turned out to be a very minimal OS installation. I've since found something called Xillinux at http://xillybus.com/xillinux. Xillinux is a Zedboard-specific Linux distribution based on Ubuntu LTS 12.04 for ARM. One thing that will take a while to get used to is that I should "shutdown" my FPGA board before I power it off -- this is something to do with the power down sequence required for the OLED display. I'm so used to just unplugging the USB cable...
It seems that Jeremy (a.k.a. JezmoSSL) -- my fellow blogger here on All Programmable Planet -- really likes his cellular automata, but I'm much more of a fractal sort of guy. To display the Mandelbrot fractals, each pixel may require 255 "Complex MACs" and an equal number of "Complex Square" calculations. As each pixel can be calculated completely independently of the others, this is a perfect workload for implementing on an FPGA.
My first-pass at a hardware fractal project started out on my Nexys2 FPGA development board (click here to see a slideshow of my various FPGA boards), where the Spartan3E multipliers just multiply two unsigned 18-bit numbers and my 1024 x 767 frame buffer was held in asynchronous DRAM. The timing was largely dictated by the memory's requirements, and this implementation could run at 100MHz.
The next platform I used for this project was a Papilio Plus prototype from the Gadget Factory. Based on a Spartan 6 LX9 FPGA, the multipliers are replaced with DSP48A blocks, which perform 18-bit signed multiplications, the results of which can be added to a 48-bit accumulator. This was a big change in architecture -- it meant that my internal number representation had to change from 36-bit fixed-point values with an external sign bit to 35-bit signed numbers, thereby dropping two bits of precision. The memory section was re-written to move to an off-FPGA SRAM chip, which was very easy to work with, but which was only large enough to support a resolution of 800 x 600. On the plus side, the performance went up to 240MHz -- this was now slightly faster than calculating the fractals on my multi-core 2.1GHz AMD laptop.
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