While I was driving like a maniac in the crazy DC traffic, I got to thinking that any project worth doing -- like our single bit processor -- deserves a top secret codename so that nobody will know what it's about but us. Besides, we give everything a name here in the South.
It didn’t take long before I came up with "Little Bit," for reasons that should be obvious. Also, based on your comments to my previous column, this won't be the first time the old 14500 has sparked interest enough for someone to work up a new version. However, our goal should be to only use the official "MC14500B Data Sheet" as our reference -- sort of a "clean room" approach. Everything is there for us to dig out. So, let's get started!
A brief project overview
Since we're going to resurrect Little Bit in a modern PLD (programmable logic device) -- in the form of a CPLD or FPGA -- we have a few things to consider. For example, it's really not possible to create a direct replacement for the original 4000-series CMOS in a PLD due to big timing and electrical differences. Therefore, we'll focus on honoring the architecture and functionality of the 14500B by creating a soft core that can be used as a system building block.
Another consideration is the fact that the 14500B had a bidirectional -- and hence tri-stateable -- data bus. But tri-state signals within an PLD are troublesome and not even necessary, so instead we will put the 1-bit data "bus" into separate "datai" (Data In) and "datao" (Data Out) signals.
Yet another point to consider is the fact that the 14500B operated from an external crystal or oscillator, and it could be run from DC to 1MHz. By comparison, most PLDs have elaborate internal clock resources that we don't need to use. So, we'll assume a fixed clock of 1MHz is coming into our core, although we could run much faster, should we need to or just want to.
Refer to the MC14500B data sheet
If you missed Part 1, you can get your very own MC14500B Data Sheet from the Data Sheet Archive. You'll need to be looking at this to follow along with what I'm talking about.
Defining the MC14500B ICU pins in HDL
Remember that the 14500B was officially referred to as an Industrial Control Unit (ICU). In VHDL, we can define the Little Bit (ICU) pins and their types as follows:
Of course, someone's probably going to start yelling about how you can reduce the amount of typing you have to do as follows:
I know you can, but I'm not doing so because I want all of this to be as understandable as possible for newcomers to HDLs (hardware description languages) in general and VHDL in particular.
The ICU's architecture
Studying the 14500B's block diagram from the data sheet reveals a lot about the processor's architecture. In our port declaration above, you'll see that we have replaced the "X1" and "X2" crystal oscillator signals with "clk"; also we have split the bi-directional "DATA" pin into separate "datai" and "datao" signals.
MC14500B block diagram.
Note that it's unclear what the RST (reset) signal does from the block diagram. If you look at the timing waveform diagrams in the data sheet, however, you'll see that this signal affects the IEN (input enable) register, the OEN (output enable) register, and the RR (result register).
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