Don't worry... I'm still working on my Little Bit single-bit processor project, but I thought you might be interested in a small side project, also in VHDL -- a 4-bit Gray code up-counter. It's pretty neat...
What's a Gray code?
The simplest way to think about a Gray Code is that it's a binary code that allows only one bit transition between adjacent numbers. A little research reveals that the original concept goes all the way back to the late 1800s, when Emile Baudot used it for the telegraph, which certainly qualifies it for my Jurassic HDL Blog. In fact, I just discovered that our fearless leader, Max, wrote a whole multi-part online article in this topic (click here to see Max's article). If you read that, you can claim to be a Gray Code expert.
The counter: What we're going to do here is to count up from 0x0 to 0xF (16 states) and repeat as long as we have a clock. Let's start by considering a standard binary counter, which could be written as follows:
Alternatively, we could write this as follows:
With regard to the "see notes" comments, ask me if you are unsure as to the differences between these two implementations.
Now, if we actually wish to count using a Gray code sequence (only one bit changing between adjacent transitions), we could use a look-up table approach to convert our binary values into their Gray code equivalents as follows:
The downside with this technique is that larger counters require exponentially larger lookup tables. The alternative is to simply count using Gray code values to begin with, but this takes more logic to ensure single-bit transitions:
There are some important combinatorial signals used in the sequential counter above. These combinatorial signals are as follows:
If you look closely, you'll see that each "more significant" bit in the counter depends upon the "k(x)" signal and the count from the previous "less significant" bit in addition to an Exclusive OR ("xor" operation) with its own previous state. It takes a bit of studying of the Gray code tables to establish the bit relationships (everything becomes clear if you look at part two of Max's article). Also, there's a special "msx" signal that I use to make sure the most significant bit rolls back for count zero.
The little 4-bit Gray code counter presented here can easily be scaled up to whatever size you require. In fact it could be written using VHDL "generic" statements to "parameterize" it for any even number width. I have it running on a little Lattice XO2 Breakout board slowly counting and lighting up four LEDs. It's soothing to watch.
Click here to download a compressed ZIP file containing complete counter file ("GCUC4bit.vhd") along with my top-level file ("GCUC4bit_top.vhd"). Maybe someone will get this running on their Papilio FPGA Development Board and share it back here on All Programmable Planet.