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Karl
Karl
6/24/2012 1:22:30 PM
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Guru
Re: Complex made simple
@Duane:  Welcome back.  Both have a lot of stuff for special cases,  but must be tolerated.  There is dataflow and control logic and the only real way to define controls is Boolean Algebra.  Data flow is registers, arrays, muxes, and busses and the only tools that I have seen are system builders that tie components together use a graphic block diagram.  Also a block diagram is the primary means to define the design to others.  Would you expect someone to understand a program given the declarations and function calls?

The module instantiation in HDL looks like function calls and and compile/synthesis only complains if it is not perfect without offering any real help.

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Duane Benson
Duane Benson
6/24/2012 12:58:11 PM
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Re: Complex made simple
Back to the pen here...

Well, airplanes and animals didn't help me decide which way to go - VHDL or Verilog - but when I shut down the computer a week ago, I was leaning toward Verilog. Of course, a few weeks prior, I was looking in the other direction.

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Max Maxfield
Max Maxfield
6/15/2012 2:57:32 PM
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Re: Complex made simple
@Duane: Despite what Adam says, I personally think Verilog is easier to wrap one's brain around ... the great thing is that (a) you now have that book I sent that shows examples of the languages side-by-side and (b) you are still in the early stages so you can still change and come to the light...

(I hope Adam doesn't see this :-)

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Max Maxfield
Max Maxfield
6/15/2012 2:55:11 PM
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Re: Complex made simple
@Duane and Karl: I've heard the word "vacation" used in sentences ... unfortunately it's been years since my name was in the same sentence :-)

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Karl
Karl
6/15/2012 2:30:12 PM
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Guru
Re: Complex made simple
@Duane:  Enjoy your vacation.  Lots of time for this stuff later.  Later, Karl...

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Duane Benson
Duane Benson
6/13/2012 6:00:48 PM
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Re: Complex made simple
Karl - I'm just starting to get into the IDE and hopefully will get to see how the schematic entry works soon. I haven't learned enough to know which I'll prefer in the long run, but I've learned enough to see benifits to the HDL entry approach.

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Duane Benson
Duane Benson
6/11/2012 4:36:43 PM
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Re: Complex made simple
Karl - in the Verilog code, the leds were grouped and defined as such:

output wire [3:0] LED

I had originally started looking at VHDL, but after a second look, Verilog seems to be more compact and easier to understand. That may change with larger designs, but I won't know that for a while. I'm not familiar enough with the two to have an opinion on which will be the best in the long run, or if typical designs will need both.

It does seem kind of verbose, but once I've broken it all into small pieces, it make sense to me.

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Karl
Karl
6/11/2012 4:04:09 PM
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Guru
Re: Complex made simple
@Duane:  Now that you have been exposed to the world of HDL, what do you think of schematic entry that you seemed to favor earlier? 

Did the LEDs have to be grouped and defined as a vector?  Or as an output?

Any thoughts about the need for both VHDL and Verilog?

Can you imagine a more verbose way to assign an output IO pin?  Now the pcb design has to actually wire the pin to the LED.

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Brian
Brian
6/11/2012 2:27:55 PM
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Re: Complex made simple
 

@Duane: Excellent, I look forward to it!

 

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Duane Benson
Duane Benson
6/11/2012 2:09:32 PM
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Blogger
Re: Complex made simple
Brian - I had been looking in the VHDL and Verilog code, where it's clear that it's a four bit vector. I probably should have been more clear about that when discussing the UCF here.

Next week, I'll jump into the Verilog code and go over that definition.

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