Karl
10/11/2012 4:15:43 PM
User Rank Guru
Re: It’s the goal that drives us -very inspiring article
@Lou: "And what we want to explore is the part to a prototype, not the finished product." Also in the blog FPGA based processors were mentioned.
Here are some thoughts:
1) A prototype should be programmable as much as possible.
2) Dedicated processors can be used to control peripherals using whatever protocol.
3) The processor has to be small and faster than typicall embedded cpu's.
4) The code footprint has to be small because of limited memory size.
5) Systems have typically been built using a bus that combined DMA and control protocol adapted/mapped to specific peripheral devices.
6) The peripherals can be verified using a one on one connection to a "driver" chip that sends and receives control info and data and does the required peripheral control.
7) Functional changes only require modification of program memory contents after the peripheral control is verified.
8) DMA block transfers to "system" memory are efficient for data and local control memory eases congestion and aids response time.
Lou Covey
8/16/2012 10:53:37 AM
User Rank Blogger
Re: It’s the goal that drives us -very inspiring article
Anysilicon, Of course it is an unrealistic number. That was something pulled out of the ether. But the concept of creating a chip for less than the current benchmark of $40 million or $20 million is curtailing innovation in the market and scaring investors away. And what we want to explore is the part to a prototype, not the finished product. There are companies that have brought chips to prototype for less than $2 million. And if that is possible, why not sub $1 million? It will take some digging and a willingness to think outside the box.
anysilicon
8/16/2012 8:04:16 AM
User Rank Beginner
It’s the goal that drives us -very inspiring article
Very inspiring article
It's the goal that drives us.
Thank you for the article and I am definitely planning to touchbase with JL Gray on this topic.
I would like to comment only on the "GDSII to components" phase, which is very often not known to FPGA/VLSI engineers.
Meeting a 10K$ budget is unrealistic. The price structures of the phases after GDSII are:
(1) Maskset generation - this is becoming a very expensive process, especially today when companies are interested in 28nm process, the smaller the node gets the higher the price. 65nm tapeout cost is 6 digits 40nm tapeout cost is 7 digits.
(2) Package tooling - if the company is delivering packaged components, a package need to be design and production tooling need to be prepared. This price would be in the range of 4-5 digits.
(3) Test solution – a proper test solution has to be developed (SW+HW), either wafer sort of component test or both. This price range is 5-6 digits.
Would be happy to share more information via my email or website www.anysilicon.com
Re: An amazing story
That is a very interesting bench mark to hold up to exisiting ASIC designers
Brian
6/18/2012 5:06:11 PM
User Rank Guru
$10k to develop the entire device...
Hi Lou,
Thanks for the video - these interviews are great.
Re: ""Can you build a chip for $10,000?" He said that he meant designing and implementing the entire device, all the way to prototype, including any tools."
That sounds like a pretty tough challenge. My first thought is that the designers work for free outside of their 'day job' and then have any development tools donated (think "sponsors"). That way, any funds are used for prototype hardware, design turns, etc.
Of course, the ROI for the designers would have to be post-production - so, their design efforts would need to be "an investment".
Those are my initial thoughts for stretching $10k to develop the entire device...
An amazing story
Hi Lou -- thanks for this. Actually the Adapteva thing truly is an amazing story. Essentially one guy designed and build his own ASIC/SoC in his basement -- I wrote about it myself in an article "From RTL to GDSII in Just Six Weeks" http://bit.ly/LA3a3Z
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