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Content by Garcia-Lasheras
Garcia-Lasheras
Member Since: January 9, 2013
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Asynchronous Design: Grabbing You by the GALS
Javier D. Garcia-Lasheras  
5/1/2013   16 comments
One of the most promising solutions to the issue of connecting multiple IP cores on a single silicon chip is the Globally Asynchronous, Locally Synchronous approach, a.k.a. GALS.
Comment: Re: Security - Garcia-Lasheras - 4/25/2013
Comment: Re: Security - Garcia-Lasheras - 4/25/2013
Comment: They say... - Garcia-Lasheras - 4/24/2013
Comment: Re: They Say - Garcia-Lasheras - 4/24/2013


latest blogs
Would you class these as adages, aphorisms, axioms, dictums, epigrams, maxims, precepts, saws, truisms, or... well, what?
Here we discover how to use the XADC (Xilinx Analog-to-Digital Convertor) in the Zynq All Programmable SoC to read the chip's internal temperature and voltage parameters and output them over an RS-232 link.
When extreme thermal cycling causes circuit boards and chip packages and the silicon die in the packages to expand and contract at different rates, problems may ensue.
In part 3 of this epic tale we consider how we might use tri-state buffers, leading up to the legendary bi-directional buffer.
Digital engineers are often confused among operational amplifiers, differential amplifiers, and instrumentation amplifiers; this is exacerbated by the fact that their circuit symbols can be similar.
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