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		<title>All Programmable Planet: Adam Taylor</title>
		<link>http://www.programmableplanet.com</link>
		<description><![CDATA[All Programmable Planet: All things programmable]]></description>
		<copyright>Copyright (C) 2000-2013 Programmable Planet - All rights reserved.</copyright>
		<language>en-us</language>
		<lastBuildDate>Thu, 23 May 2013 02:20:30 EDT</lastBuildDate>
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			<title>All Programmable Planet: Adam Taylor</title>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 7</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=263527&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[Here we discover how to use the XADC (Xilinx Analog-to-Digital Convertor) in the Zynq All Programmable SoC to read the chip's internal temperature and voltage parameters and output them over an RS-232 link.]]></description>
			<pubDate>Fri, 17 May 2013 14:45:00 EDT</pubDate>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 6</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=262130&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[Now it's time to consider how we can implement and use the Xilinx Analog to Digital Convertor (XADC) within a Zynq All Programmable SoC-based system.]]></description>
			<pubDate>Mon, 15 Apr 2013 16:10:00 EDT</pubDate>
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			<title>Implementing Xilinx Agile Mixed Signal With Zynq</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=260989&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[The Zynq All Programmable SoC comes equipped with programmable analog capabilities that can be used in a wide variety of applications, including defense, industrial, and automotive systems.]]></description>
			<pubDate>Fri, 22 Mar 2013 09:00:00 EDT</pubDate>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 5</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=260378&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[This is the blog we've all been waiting for - the point where we finally create our very first, standalone, "bare metal" Zynq application!]]></description>
			<pubDate>Tue, 12 Mar 2013 12:30:00 EDT</pubDate>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 4</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=258696&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[In the case of a real-world use model, we want to store our software program and configuration bitstream in nonvolatile memory and configure the device after the power comes on.]]></description>
			<pubDate>Fri, 08 Feb 2013 15:35:00 EST</pubDate>
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			<title>Ask Adam VHDL: Libraries</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=258054&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[In its simplest form, a library is a directory on a server or computer that contains VHDL packages, entities, and architectures, thereby allowing these items to be used across multiple projects.]]></description>
			<pubDate>Fri, 25 Jan 2013 18:19:00 EST</pubDate>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 3</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=257259&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[We are now at the point where we can create a simple C program, compile it, download the executable into our ZedBoard, and run it to see what happens.]]></description>
			<pubDate>Fri, 11 Jan 2013 18:50:00 EST</pubDate>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 2</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=256098&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[This is where we lock in our development board and configure our processing system in preparation for creating and running some code.]]></description>
			<pubDate>Fri, 14 Dec 2012 18:50:00 EST</pubDate>
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			<title>Adam Powers Up His Zynq ZedBoard, Part 1</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=255268&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[Adam takes delivery of his ZedBoard boasting a Xilinx Zynq-7000 All Programmable SoC and starts the process of getting it up and running.]]></description>
			<pubDate>Fri, 30 Nov 2012 15:55:00 EST</pubDate>
			<guid isPermaLink="true">http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=255268</guid>
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			<title>Space FPGA User Workshop Day 2: Non-European FPGAs</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=254494&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[There was a little gentle ribbing between Xilinx and Microsemi about who had the highest number of FPGAs on Mars (Microsemi) and who had the most logic gates (Xilinx).]]></description>
			<pubDate>Fri, 16 Nov 2012 13:17:00 EST</pubDate>
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			<title>Space FPGA User Workshop Day 1: European FPGAs</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=254310&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[The recent SPACE FPGA User Workshop involved the ESA (European Space Agency) and the major FPGA manufacturers of space grade devices.]]></description>
			<pubDate>Wed, 14 Nov 2012 14:00:00 EST</pubDate>
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			<title>UKube: Xilinx SRAM-Based FPGAs Are Spacebound</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=252334&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[A key experiment involves the flight of a large, high-performance Xilinx Virtex-4 SRAM-based FPGA with the aim of achieving additional in-flight experience, and gaining a better understanding of this type of component's radiation performance and capabilities in low Earth orbit.]]></description>
			<pubDate>Fri, 12 Oct 2012 14:39:00 EDT</pubDate>
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			<title>Ask Adam VHDL: Edge Detection on Signals</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=251984&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[It's possible to create code that will simulate quite happily, but that will fail to synthesize as expected.]]></description>
			<pubDate>Fri, 05 Oct 2012 17:00:00 EDT</pubDate>
			<guid isPermaLink="true">http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=251984</guid>
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			<title>FPGA-Based System Reliability: Tips &amp; Tricks</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=251213&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[Working at the module level, we as engineers can take a number of steps to increase reliability.]]></description>
			<pubDate>Fri, 21 Sep 2012 18:10:00 EDT</pubDate>
			<guid isPermaLink="true">http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=251213</guid>
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			<title>Ask Adam: FPGAs &amp; RS-232</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=251001&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[The beauty of an FPGA-based UART is that it can be easily adapted to interface to other protocols. This allows you to develop a soft UART core that can be reused across a number of projects. ]]></description>
			<pubDate>Tue, 18 Sep 2012 18:07:00 EDT</pubDate>
			<guid isPermaLink="true">http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=251001</guid>
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			<title>MTBF &amp; FPGA-Based System-Level Reliability</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=250924&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[In many cases, designers may use both the "parts count" and "stressed reliability" techniques to determine the predicted failure rate for a system.]]></description>
			<pubDate>Mon, 17 Sep 2012 18:55:00 EDT</pubDate>
			<guid isPermaLink="true">http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=250924</guid>
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			<title>Are Your FPGA Designs Secure?</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=250584&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[The topic of design security is interesting in the context of FPGA designs, because we face just as many -- if not more -- challenges with regard to securing our designs as our microcontroller cousins...]]></description>
			<pubDate>Tue, 11 Sep 2012 18:25:00 EDT</pubDate>
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			<title>Ask Adam VHDL: Handling the Don't Care Value</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=249434&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[Although the "-" (Don't Care) value is usually employed as an output assignment, it can be used as an input to a comparison operation, if you know what you are doing...]]></description>
			<pubDate>Mon, 20 Aug 2012 18:13:00 EDT</pubDate>
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			<title>Ask Adam VHDL: Logic Values</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=249233&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[A VHDL signal that uses the "std_logic_1164 package" can undertake one of nine different values. But why does a signal that spends the majority of its time as a 0 or 1 need seven other values to accurately represent its behavior?]]></description>
			<pubDate>Thu, 16 Aug 2012 15:00:00 EDT</pubDate>
			<guid isPermaLink="true">http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=249233</guid>
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			<title>Ask Adam: UART, SPI, I2C &amp; More</title>
			<link>http://www.programmableplanet.com/author.asp?section_id=2142&amp;doc_id=248993&amp;f_src=programmableplanet_section_2142</link>
			<dc:creator>Adam Taylor</dc:creator>
			<description><![CDATA[In this mini-series I will be exploring the UART, SPI, and I2C communications protocols, explaining their histories, pros and cons, and typical uses. Also, I will be discussing how to implement these protocols inside an FPGA.]]></description>
			<pubDate>Tue, 14 Aug 2012 09:00:00 EDT</pubDate>
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