Have you ever noticed how sometimes there seems to be an ebb and flow to the things that are happening around us? For example, it seems to me that more "wise words"-type items have been passing in front of my eyes recently than is usually the case.
When we left Part 6 of this epic mini-series, we had just completed the generation of the bit file containing the XADC (Xilinx Analog-to-Digital Convertor) along with the original GPIO (General-Purpose Input/Output) connected to the LEDs and the processor system.
It is often the case that printed circuit boards (PCBs) and the components mounted on them, including the occasional FPGA, will be thermal cycled over a great temperature range several times a day, even when in operation.
In Part 1 of this mini-series we considered a three-state (tri-state) scenario in the context of an input buffer. In Part 2 we progressed to a tri-state output buffer. Now, in this column we will consider the tri-state concept in the context of the legendary bi-directional buffer, but first...
As you may recall, in my previous column we discussed operational amplifiers (op-amps) used to implement straightforward voltage signal amplifiers. We also discussed operational amplifiers configured in such a way as to form differential amplifiers. Now, in this blog, we will consider the ways in which we can use operational amplifiers to implement ...
In this blog I will continue my posts on a chess-playing FPGA, which we first introduced several months ago. (See: A Chess-Playing FPGA: Introduction.)
5/19/2013 6:01:42 PM
jandecaluwe on A Chess-Playing FPGA: Let the Coding Begin!
5/19/2013 5:10:57 PM
jandecaluwe on A Chess-Playing FPGA: Let the Coding Begin!
5/19/2013 4:06:19 PM
josyb on A Word to the Wise
5/19/2013 3:19:57 PM
aj1s on A Chess-Playing FPGA: Let the Coding Begin!
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